公开(公告)号：US20210014087A1

公开(公告)日：2021-01-14

申请号：US17037140

申请日：2020-09-29

Applicant: Texas Instruments Incorporated

Inventor： Raghu GANESAN ,  Kalpesh Laxmanbhai RAJAI ,  Saravanakkumar Swaminathan RADHAKRISHNAN

IPC: H04L25/03 ,  H04B1/16

Abstract: A device includes a receiver having analog front-end circuitry and a digital signal processing (DSP) circuit. The DSP circuit is configured to select one of a plurality of digital equalization (DEQ) filter options and to perform DEQ operations based on the selected DEQ filter option, wherein the DSP circuit is configured to select one of the plurality of DEQ filter options based on a channel length estimate and a plurality of different sets of DEQ filter coefficients predetermined for different channel lengths.

公开(公告)号：US20200092144A1

公开(公告)日：2020-03-19

申请号：US16575151

申请日：2019-09-18

Applicant: Texas Instruments Incorporated

Inventor： Raghu GANESAN ,  Kalpesh Laxmanbhai RAJAI ,  Saravanakkumar Swaminathan RADHAKRISHNAN

IPC: H04L25/03 ,  H04B1/16

Abstract: A device includes a receiver having analog front-end circuitry and a digital signal processing (DSP) circuit. The DSP circuit is configured to select one of a plurality of digital equalization (DEQ) filter options and to perform DEQ operations based on the selected DEQ filter option, wherein the DSP circuit is configured to select one of the plurality of DEQ filter options based on a channel length estimate and a plurality of different sets of DEQ filter coefficients predetermined for different channel lengths.