公开(公告)号：US20240047266A1

公开(公告)日：2024-02-08

申请号：US17880685

申请日：2022-08-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Liang Liao ,  Chee Hau Ng ,  Ching-Yang Wen ,  Purakh Raj Verma

IPC: H01L21/762 ,  H01L21/304 ,  H01L21/768

CPC classification number: H01L21/76251 ,  H01L21/304 ,  H01L21/76865

Abstract: A method of forming a protective layer utilized in a silicon remove process includes bonding a first wafer to a second wafer, wherein the first wafer comprises a first silicon substrate with a first device structure disposed thereon and the second wafer comprises a second silicon substrate with a second device structure disposed thereon. After that, a first trim process is performed to thin laterally an edge of the first wafer and an edge of the second device structure. After the first trim process, a protective layer is formed to cover a back side of the second silicon substrate. After forming the protective layer, a silicon remove process is performed to remove only the first silicon substrate.

公开(公告)号：US20230268246A1

公开(公告)日：2023-08-24

申请号：US18136329

申请日：2023-04-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Liang Liao ,  Purakh Raj Verma ,  Ching-Yang Wen ,  Chee Hau Ng

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/15

CPC classification number: H01L23/3735 ,  H01L21/4871 ,  H01L23/15 ,  H01L23/3736

Abstract: A semiconductor structure includes a glass substrate and a device structure. The glass substrate includes a glass layer, a heat dissipation layer and a silicon nitride layer stacked from bottom to top. The device structure includes at least one semiconductor device integrated in a device layer situated over the silicon nitride layer of the glass substrate. Or, the glass substrate includes a glass layer and a silicon nitride layer stacked from bottom to top. The device structure includes at least one semiconductor device integrated in a device layer, and a heat dissipation layer is stacked on the device layer, wherein the heat dissipation layer is bonded with the silicon nitride layer of the glass substrate. The present invention also provides a method of wafer bonding for manufacturing said semiconductor structure.

公开(公告)号：US11670567B2

公开(公告)日：2023-06-06

申请号：US16924206

申请日：2020-07-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Liang Liao ,  Purakh Raj Verma ,  Ching-Yang Wen ,  Chee Hau Ng

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/15

CPC classification number: H01L23/3735 ,  H01L21/4871 ,  H01L23/15 ,  H01L23/3736

Abstract: A semiconductor structure includes a glass substrate and a device wafer. The glass substrate includes a glass layer, a heat dissipation layer and a silicon nitride layer stacked from bottom to top. The device wafer includes at least one semiconductor device integrated in a device layer situated over the silicon nitride layer of the glass substrate. Or, the glass substrate includes a glass layer and a silicon nitride layer stacked from bottom to top. The device wafer includes at least one semiconductor device integrated in a device layer, and a heat dissipation layer is stacked on the device layer, wherein the heat dissipation layer is bonded with the silicon nitride layer of the glass substrate. The present invention also provides a method of wafer bonding for manufacturing said semiconductor structure.

公开(公告)号：US12300534B2

公开(公告)日：2025-05-13

申请号：US17880685

申请日：2022-08-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Liang Liao ,  Chee Hau Ng ,  Ching-Yang Wen ,  Purakh Raj Verma

IPC: H01L21/762 ,  H01L21/304 ,  H01L21/768

Abstract: A method of forming a protective layer utilized in a silicon remove process includes bonding a first wafer to a second wafer, wherein the first wafer comprises a first silicon substrate with a first device structure disposed thereon and the second wafer comprises a second silicon substrate with a second device structure disposed thereon. After that, a first trim process is performed to thin laterally an edge of the first wafer and an edge of the second device structure. After the first trim process, a protective layer is formed to cover a back side of the second silicon substrate. After forming the protective layer, a silicon remove process is performed to remove only the first silicon substrate.

公开(公告)号：US12080622B2

公开(公告)日：2024-09-03

申请号：US18136329

申请日：2023-04-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Liang Liao ,  Purakh Raj Verma ,  Ching-Yang Wen ,  Chee Hau Ng

IPC: H01L23/373 ,  H01L21/48 ,  H01L23/15

CPC classification number: H01L23/3735 ,  H01L21/4871 ,  H01L23/15 ,  H01L23/3736

Abstract: A semiconductor structure includes a glass substrate and a device structure. The glass substrate includes a glass layer, a heat dissipation layer and a silicon nitride layer stacked from bottom to top. The device structure includes at least one semiconductor device integrated in a device layer situated over the silicon nitride layer of the glass substrate. Or, the glass substrate includes a glass layer and a silicon nitride layer stacked from bottom to top. The device structure includes at least one semiconductor device integrated in a device layer, and a heat dissipation layer is stacked on the device layer, wherein the heat dissipation layer is bonded with the silicon nitride layer of the glass substrate. The present invention also provides a method of wafer bonding for manufacturing said semiconductor structure.

公开(公告)号：US20220013430A1

公开(公告)日：2022-01-13

申请号：US16924206

申请日：2020-07-09

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chia-Liang Liao ,  Purakh Raj Verma ,  Ching-Yang Wen ,  Chee Hau Ng

IPC: H01L23/373 ,  H01L23/15 ,  H01L21/48

Abstract: A semiconductor structure includes a glass substrate and a device wafer. The glass substrate includes a glass layer, a heat dissipation layer and a silicon nitride layer stacked from bottom to top. The device wafer includes at least one semiconductor device integrated in a device layer situated over the silicon nitride layer of the glass substrate. Or, the glass substrate includes a glass layer and a silicon nitride layer stacked from bottom to top. The device wafer includes at least one semiconductor device integrated in a device layer, and a heat dissipation layer is stacked on the device layer, wherein the heat dissipation layer is bonded with the silicon nitride layer of the glass substrate. The present invention also provides a method of wafer bonding for manufacturing said semiconductor structure.