公开(公告)号：US11151724B2

公开(公告)日：2021-10-19

申请号：US16429772

申请日：2019-06-03

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tzu-Ping Kao ,  Ching-Hsing Hsieh ,  Chia-Chi Chang ,  Ju-Te Chen ,  Chen-Hui Huang ,  Cheng-Hsien Chen

IPC: G06T7/13 ,  G06T7/00 ,  G06T7/60

Abstract: An automatic detecting method and an automatic detecting apparatus using the same are provided. The automatic detecting apparatus includes an inputting unit, a dividing unit, a contouring unit, a range analyzing unit, a boundary analyzing unit, an edge detecting unit, an expanding unit and an overlapping unit. The dividing unit is used for dividing an overlooking image into four clusters via a clustering algorithm. The contouring unit is used for obtaining a contour. The range analyzing unit is used for obtaining a detecting range. The boundary analyzing unit is used for obtaining a circular boundary in the detecting range. The edge detecting unit is used for obtaining a plurality of edges in the circular boundary. The expanding unit is used for expanding the edges to obtain a plurality of expanded edges. The overlapping unit is used for overlapping the expanded edges and the contour to obtain a defect pattern.

公开(公告)号：US11821847B2

公开(公告)日：2023-11-21

申请号：US17380578

申请日：2021-07-20

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Cheng-Hsien Chen ,  Chia-Feng Hsiao ,  Chung-Hsuan Wu ,  Chen-Hui Huang ,  Nai-Ying Lo ,  En-Wei Tsui ,  Yung-Yu Yang ,  Chen-Hsuan Hung

IPC: G06T7/00 ,  G01N21/95 ,  G06T7/13

CPC classification number: G01N21/9505 ,  G06T7/0004 ,  G06T7/13 ,  G06T2207/30148

Abstract: A wafer backside defect detection method and a wafer backside defect detection apparatus are provided. The wafer backside defect detection method includes the following steps. A peripheral edge area of a wafer backside image that at least one notch is located is cropped off. Adjacent white pixels on the wafer backside image are connected to obtain a plurality of abnormal regions. If a total area of top N of the abnormal regions is more than 10% of an area of the wafer, it is deemed that the wafer has a roughness defect. N is a natural number. If the total area of the top N of the abnormal regions is less than 1% of the area of the wafer and a largest abnormal region of the abnormal regions is longer than a predetermined length, it is deemed that the wafer has a scratch defect.