公开(公告)号：US09853074B2

公开(公告)日：2017-12-26

申请号：US15410715

申请日：2017-01-19

Applicant: XINTEC INC.

Inventor： Ho-Yin Yiu ,  Chi-Chang Liao ,  Shih-Yi Lee ,  Yen-Kang Raw

IPC: H01L27/146

CPC classification number: H01L27/14621 ,  H01L27/1462 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14685 ,  H01L2224/11

Abstract: This present invention provides a chip scale sensing chip package, comprising: a sensing chip with a first top surface and a first bottom surface opposite to each other, comprising: a sensing device adjacent to the first top surface; and a plurality of conductive pads adjacent to first top surface and the sensing device; a wiring layer formed on the first bottom surface and connected to each of the conductive pads; a dam having a supporter with a first opening and a spacer with a second opening formed on the first top surface, wherein the supporter is within the second opening and adjacent to the spacer, and the spacer is higher than the supporter by a predetermined distance d; a lens formed on the first top surface exposed by the first opening and above the sensing device; and an optical filter deposed on the supporter and above the lens.