公开(公告)号：US10115463B1

公开(公告)日：2018-10-30

申请号：US14750947

申请日：2015-06-25

Applicant: Xilinx, Inc.

Inventor： Weirong Jiang ,  Denis Rystsov

IPC: G11C15/04 ,  G06F11/07

Abstract: In an example, an integrated circuit (IC) includes a memory including at least one random access memory (RAM). Each of the at least one RAM stores bits representing match vectors indicative of whether search keys match ternary rules. The IC further includes a verification circuit, coupled to the memory, operable to verify the bits stored in the at least one RAM by performing at least one of: decoding at least one of the ternary rules from the bits stored in the at least one RAM; or checking the bits stored in the at least one RAM against expected content of at least one of the ternary rules.