公开(公告)号：US10754759B1

公开(公告)日：2020-08-25

申请号：US15889001

申请日：2018-02-05

Applicant: Xilinx, Inc.

Inventor： Amitava Majumdar ,  Georgios Tzimpragos ,  Jason Villarreal ,  Kumar Deepak ,  Jayashree Rangarajan

IPC: G06F11/00 ,  G06F11/36

Abstract: An execution circuit inputs a plurality of data units, performs unit operations on the data units, and registers results of the unit operations in response to oscillations of a clock signal. A control circuit controls activation of the unit operations, and outputs a start signal to the execution circuit to activate each unit operation and/or a completion signal to indicate completion of each unit operation. A debug circuit stores breakpoint flags associated with the unit operations. Each breakpoint flag has a state that specifies whether to stop oscillations of the clock signal. The debug circuit further receives the start and/or completion signal and evaluates, while the clock signal oscillates to the execution circuit, a state of the start and/or completion signal and a state of the breakpoint flag associated with the unit operation. Oscillations of the clock signal are stopped in response to the evaluation of the signals.