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119 条记录 (耗时 0.027 秒)

    Heart valve
    93.
    发明授权
    Heart valve 失效
    心脏瓣膜

    公开(公告)号：US5562729A

    公开(公告)日：1996-10-08

    申请号：US332720

    申请日：1994-11-01

    申请人： David L. Purdy ,  James R. Cupp ,  Frederick J. Shipko ,  Robert D. Norman

    发明人： David L. Purdy ,  James R. Cupp ,  Frederick J. Shipko ,  Robert D. Norman

    IPC分类号： A61F2/24

    CPC分类号： A61F2/2412 ,  Y10S623/90

    摘要： A multi-leaflet (usually trileaflet) heart valve composed of biocompatible polymer which, in all of its embodiments, simultaneously imitates the structure and dynamics of biological heart valves and avoids promotion of calcification. The valve includes a plurality of flexible leaflets dip cast on a mandrel, which leaflets are then bonded with a bonding agent to the interior surfaces of a plurality of struts on a metal-reinforced prosthetic stent. The leaflets open and close in response to the pumping action of the heart and, due to the design of the leaflets, fatigue resistance of the heart valve is high. The leaflets and the polymer components of the prosthetic stent are manufactured of biocompatible polymers exhibiting intrinsic calcification-resistant properties.

    摘要翻译： 一种由生物相容性聚合物组成的多叶（通常是三叶草）心脏瓣膜，其在其所有实施方案中同时模仿生物心脏瓣膜的结构和动力学并避免促进钙化。 阀包括浸在心轴上的多个柔性传单，然后将这些小叶与粘合剂结合到金属增强的假体支架上的多个支柱的内表面上。 响应于心脏的泵送动作，传单打开和关闭，并且由于小叶的设计，心脏瓣膜的抗疲劳性高。 假体支架的传单和聚合物组分由表现出固有的抗钙化特性的生物相容性聚合物制成。

    METHOD FOR ASSIGNING ADDRESSES TO MEMORY DEVICES
    96.
    发明申请
    METHOD FOR ASSIGNING ADDRESSES TO MEMORY DEVICES 失效
    用于将地址分配给存储器件的方法

    公开(公告)号：US20090089536A1

    公开(公告)日：2009-04-02

    申请号：US12236919

    申请日：2008-09-24

    申请人： Robert D. Norman ,  Vinod C. Lakhani

    发明人： Robert D. Norman ,  Vinod C. Lakhani

    IPC分类号： G06F12/02

    CPC分类号： G06F13/1694 ,  G06F12/0661

    摘要： A memory system having a memory controller and several separate memory devices connected to the controller by a system bus. The memory devices each included an array of memory cells, addressing circuitry used to address the cells and an address storage circuit which stores a local address unique to each of the memory devices. The local addresses are sequentially assigned to the memory devices by selecting a first one of the devices and forwarding an address assign command to the selected device. A command decoder, having detected the address assign command, will permit a local address placed on the bus by the controller to be loaded into the selected memory device. This sequence will continue until all of the memory devices have been assigned local addresses at which time the memory devices can be accessed to perform memory read, program, erase and other operations.

    摘要翻译： 一种存储器系统，具有存储器控制器和通过系统总线连接到控制器的几个单独的存储器件。 存储器件各自包括存储器单元阵列，用于寻址单元的寻址电路和存储每个存储器件唯一的本地地址的地址存储电路。 通过选择设备中的第一个并将地址分配命令转发到所选择的设备，将本地地址依次分配给存储器设备。 已经检测到地址分配命令的命令解码器将允许由控制器放置在总线上的本地地址被加载到所选择的存储器件中。 该序列将继续，直到所有存储器件都被分配了本地地址，此时可以访问存储器件以执行存储器读取，编程，擦除和其他操作。

    WEAR LEVELING TECHNIQUES FOR FLASH EEPROM SYSTEMS
    97.
    发明申请
    WEAR LEVELING TECHNIQUES FOR FLASH EEPROM SYSTEMS 审中-公开
    消除闪存EEPROM系统的等级技术

    公开(公告)号：US20080162798A1

    公开(公告)日：2008-07-03

    申请号：US12038666

    申请日：2008-02-27

    申请人： Karl M.J. Lofgren ,  Robert D. Norman ,  Gregory B. Thelin ,  Anil Gupta

    发明人： Karl M.J. Lofgren ,  Robert D. Norman ,  Gregory B. Thelin ,  Anil Gupta

    IPC分类号： G06F12/00

    CPC分类号： G11C16/3495 ,  G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7211 ,  G11C8/12 ,  G11C16/349

    摘要： A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.

    摘要翻译： 由闪存电可擦除和可编程只读存储器（“EEPROM”）组成的块的大容量存储系统被组合成块，这些块又被分组到存储体中，以便管理存储器经历的擦除和重写周期的数量 银行为了延长内存系统的使用寿命。 由于这种类型的存储器单元在有限数量的擦除和重写周期之后变得不可用，尽管在数万个周期中，避免了不均匀地使用存储器组，使得整个存储器不会变得不起作用，因为它的一个存储体具有 达到了终点，而其他银行也没有被使用。 监视存储器组的相对使用，并且响应于不均匀使用的检测，使它们的物理地址彼此周期性交换，以便在存储器的使用寿命期内甚至使用它们。

    System and method for assigning addresses to memory devices
    99.
    发明授权
    System and method for assigning addresses to memory devices 失效
    用于将地址分配给存储器件的系统和方法

    公开(公告)号：US06965923B2

    公开(公告)日：2005-11-15

    申请号：US09737218

    申请日：2000-12-14

    申请人： Robert D. Norman ,  Vinod C. Lakhani

    发明人： Robert D. Norman ,  Vinod C. Lakhani

    IPC分类号： G06F12/06

    CPC分类号： G06F13/1694 ,  G06F12/0661

    摘要： A memory system having a memory controller and several separate memory devices connected to the controller by a system bus. The memory devices each included an array of memory cells, addressing circuitry used to address the cells and an address storage circuit which stores a local address unique to each of the memory devices. The local addresses are sequentially assigned to the memory devices by selecting a first one of the devices and forwarding an address assign command to the selected device. A command decoder, having detected the address assign command, will permit a local address placed on the bus by the controller to be loaded into the selected memory device. This sequence will continue until all of the memory devices have been assigned local addresses at which time the memory devices can be accessed to perform memory read, program, erase and other operations.

    摘要翻译： 一种存储器系统，具有存储器控制器和通过系统总线连接到控制器的几个单独的存储器件。 存储器件各自包括存储器单元阵列，用于寻址单元的寻址电路和存储每个存储器件唯一的本地地址的地址存储电路。 通过选择设备中的第一个并将地址分配命令转发到所选择的设备，将本地地址依次分配给存储器设备。 已经检测到地址分配命令的命令解码器将允许由控制器放置在总线上的本地地址被加载到所选择的存储器件中。 该序列将继续，直到所有存储器件都被分配了本地地址，此时可以访问存储器件以执行存储器读取，编程，擦除和其他操作。