公开(公告)号：US4160236A

公开(公告)日：1979-07-03

申请号：US831140

申请日：1977-09-07

申请人： Takafumi Oka ,  Hiroshi Nakanishi

发明人： Takafumi Oka ,  Hiroshi Nakanishi

IPC分类号： G06F11/10 ,  G11B20/18 ,  G11C19/00 ,  G11C19/28 ,  G06F11/12

CPC分类号： G11B20/1833 ,  G11C19/287

摘要： A feedback shift register for use in a system processing a data signal received from a memory such as a magnetic disc or magnetic drum or from, for example, a communication line so as to detect and correct any error which may present in the data signal. The feedback shift register comprises means for producing address information by making a first logical operation on the input data and the internal state of the shift register, a memory providing data determined by a second logical operation among the bits of the address information upon reception of the address information from the above means, and means for renewing the internal state of the shift register upon reception of the data from the memory. A peculiar polynomial suited to the characteristic of an associated memory, communication line or the like is based on the first and second logical operations, and the shift register can process a high-speed data signal in spite of its simple construction.