公开(公告)号：US20050214478A1

公开(公告)日：2005-09-29

申请号：US10873600

申请日：2004-06-22

申请人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

发明人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

IPC分类号： C23C16/00 ,  C23C16/40 ,  C23C16/452 ,  C23C16/517

CPC分类号： C23C16/452 ,  C23C16/402 ,  C23C16/517

摘要： A chemical vapor deposition process is carried out in a reactor chamber having a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower process region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, each orifice being oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. A workpiece is placed in the process region, so that a workpiece surface of the workpiece is generally facing a surface plane of the nearest one of the ion shower grids, and a gas mixture comprising a deposition precursor species is furnished into the ion generation region. The process region is evacuated at an evacuation rate sufficient to create a pressure drop across the plural ion shower grids between the ion generation and process regions whereby the pressure in the ion generation region is several times the pressure in the process region. The process further includes applying plasma source power to generate a plasma of the deposition precursor species in the ion generation region and applying successive grid potentials to successive ones of the grids.

摘要翻译： 化学气相沉积工艺在具有一组多个并联离子淋浴网格的反应室中进行，该平行离子淋浴网将腔室分成上部离子产生区域和下部处理区域，每个离子淋浴网格具有相互配准的多个孔口 网格到网格，每个孔口相对于相应的离子喷淋网格的表面平行于非平行方向。 将工件放置在工艺区域中，使得工件的工件表面通常面向最接近的一个离子淋浴栅格的表面，并且将包含沉积前体物质的气体混合物配备到离子产生区域中。 处理区域以足以在离子产生和处理区域之间的多个离子淋浴栅格之间产生压降的抽空速率抽真空，由此离子产生区域中的压力是处理区域中压力的几倍。 该方法还包括施加等离子体源功率以在离子产生区域中产生沉积前体物质的等离子体，并将连续的栅格电势施加到连续的栅极。

公开(公告)号：US20050191828A1

公开(公告)日：2005-09-01

申请号：US11003000

申请日：2004-12-01

申请人： Amir Al-Bayati ,  Rick Roberts ,  Kenneth Collins ,  Ken MacWilliams ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

发明人： Amir Al-Bayati ,  Rick Roberts ,  Kenneth Collins ,  Ken MacWilliams ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

IPC分类号： H01J37/32 ,  H01L21/4763

CPC分类号： H01J37/32082 ,  H01J37/321 ,  H01L21/76254

摘要： An integrated microelectronic circuit has a multi-layer interconnect structure overlying the transistors consisting of stacked metal pattern layers and insulating layers separating adjacent ones of said metal pattern layers. Each of the insulating layers is a dielectric material with plural gas bubbles distributed within the volume of the dielectric material to reduce the dielectric constant of the material, the gas bubbles being formed by ion implantation of a gaseous species into the dielectric material.

摘要翻译： 集成的微电子电路具有覆盖由堆叠的金属图案层和分离相邻的所述金属图案层的绝缘层的晶体管的多层互连结构。 每个绝缘层是具有分布在电介质材料的体积内的多个气泡的介电材料，以降低材料的介电常数，气泡通过将气态物质离子注入电介质材料而形成。

公开(公告)号：US20070042580A1

公开(公告)日：2007-02-22

申请号：US11551196

申请日：2006-10-19

申请人： Amir Al-Bayati ,  Rick Roberts ,  Kenneth Collins ,  Ken MacWilliams ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

发明人： Amir Al-Bayati ,  Rick Roberts ,  Kenneth Collins ,  Ken MacWilliams ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

IPC分类号： H01L21/425

CPC分类号： H01L21/823864 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/02321 ,  H01L21/0234 ,  H01L21/31695 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/823871 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： An integrated microelectronic circuit has a multi-layer interconnect structure overlying the transistors consisting of stacked metal pattern layers and insulating layers separating adjacent ones of said metal pattern layers. Each of the insulating layers is a dielectric material with plural gas bubbles distributed within the volume of the dielectric material to reduce the dielectric constant of the material, the gas bubbles being formed by ion implantation of a gaseous species into the dielectric material.

摘要翻译： 集成的微电子电路具有覆盖由堆叠的金属图案层和分离相邻的所述金属图案层的绝缘层的晶体管的多层互连结构。 每个绝缘层是具有分布在电介质材料的体积内的多个气泡的介电材料，以降低材料的介电常数，气泡通过将气态物质离子注入电介质材料而形成。

公开(公告)号：US20060263540A1

公开(公告)日：2006-11-23

申请号：US11131899

申请日：2005-05-17

申请人： Kartik Ramaswamy ,  Hiroji Hanawa ,  Biagio Gallo ,  Kenneth Collins ,  Kai Ma ,  Vijay Parihar ,  Dean Jennings ,  Abhilash Mayur ,  Amir Al-Bayati ,  Andrew Nguyen

发明人： Kartik Ramaswamy ,  Hiroji Hanawa ,  Biagio Gallo ,  Kenneth Collins ,  Kai Ma ,  Vijay Parihar ,  Dean Jennings ,  Abhilash Mayur ,  Amir Al-Bayati ,  Andrew Nguyen

IPC分类号： H05H1/24

CPC分类号： H05H1/46

摘要： A method of processing a workpiece includes introducing an optical absorber material precursor gas into a chamber containing the workpiece, generating an RF oscillating toroidal plasma current in a reentrant path that includes a process zone overlying the workpiece by applying RF source power, so as to deposit a layer of an optical absorber material on the workpiece, and exposing the workpiece to optical radiation that is at least partially absorbed in the optical absorber layer.

摘要翻译： 一种处理工件的方法包括将光吸收材料前体气体引入到包含工件的室中，在折入路径中产生RF振荡环形等离子体电流，其包括通过施加RF源功率覆盖工件的工艺区域，以便沉积 在工件上的光吸收材料层，以及将工件暴露于至少部分地吸收在光吸收层中的光辐射。

公开(公告)号：US20060019039A1

公开(公告)日：2006-01-26

申请号：US10895784

申请日：2004-07-20

申请人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

发明人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

IPC分类号： C23C14/00

CPC分类号： H01J37/32357 ,  C23C14/046 ,  C23C14/48 ,  C23C16/045 ,  H01J37/32412

摘要： A plasma immersion ion implantation process for implanting a selected species at a desired ion implantation depth profile in a workpiece is carried out in a reactor chamber having a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower process region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, the plural orifices oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. The process includes placing a workpiece in the process region, the workpiece having a workpiece surface generally facing the surface plane of the closest one of the plural ion shower grids, and furnishing the selected species into the ion generation region. The process further includes evacuating the process region, and applying plasma source power to generate a plasma of the selected species in the ion generation region. The process also includes applying successive grid potentials to successive ones of the grids and applying a bias potential to the workpiece. The combination of the grid and bias potentials corresponds to the desired ion implantation depth profile in the workpiece.

摘要翻译： 在具有一组多个并联离子淋浴网格的反应室中进行用于在工件中以期望的离子注入深度分布植入选定物种的等离子体浸没离子注入方法，该多个平行离子淋浴网将腔室分成上部离子产生区域和下部 处理区域，每个离子淋浴栅格具有从栅格到栅格相互配准的多个孔，多个孔相对于各个离子喷淋栅格的表面平行于非平行方向。 该工艺包括将工件放置在工艺区域中，工件具有大致面对多个离子淋浴栅格中最接近的一个的表面的工件表面，并将所选择的物质提供到离子产生区域中。 该方法还包括抽空处理区域，以及施加等离子体源功率以在离子产生区域中产生所选物种的等离子体。 该过程还包括将连续的栅格电势施加到连续的栅格并向工件施加偏置电位。 栅格和偏置电位的组合对应于工件中期望的离子注入深度分布。

公开(公告)号：US20050211547A1

公开(公告)日：2005-09-29

申请号：US10873609

申请日：2004-06-22

申请人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

发明人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

IPC分类号： C23C14/00 ,  C23C14/34 ,  C23C14/35 ,  C23C16/04 ,  C23C16/507 ,  H01J37/32

CPC分类号： H01J37/32449 ,  C23C14/0036 ,  C23C14/358 ,  C23C16/045 ,  C23C16/507 ,  H01J37/32357

摘要： A reactive sputter deposition process is carried out in a reactor chamber having a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower process region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, each orifice being oriented in a non-parallel direction relative to a surface plane of the respective grid. A workpiece is placed in the process region, the workpiece having a workpiece surface generally facing the surface plane of nearest one of the ion shower grids. The process includes sputtering deposition precursor species from a sputter target comprising a semiconductor species in the ion generation region, applying RF plasma source power to the ion generation region so as to generate a plasma of the deposition precursor species sputtered from the target, applying successive grid potentials to successive ones of the grids to create a flux of ions through at least some of the plural grids, and furnishing a gas species into the reactor chamber for combining with the semiconductor atoms to form molecules that deposit on the workpiece surface.

摘要翻译： 反应性溅射沉积工艺在具有一组多个平行离子淋浴网格的反应器室中进行，所述多个并联离子淋浴网将腔室分成上部离子产生区域和下部处理区域，每个离子淋浴网格具有相互配准的多个孔口 网格到网格，每个孔口相对于相应网格的表面平面在非平行方向上定向。 工件被放置在工艺区域中，工件的工件表面一般面对最接近离子淋浴网格的表面。 该方法包括从离子产生区域中包含半导体物质的溅射靶溅射沉积前体物质，将RF等离子体源功率施加到离子产生区域，以产生从靶溅射的沉积前体物质的等离子体，施加连续格栅 通过至少一些多个栅格产生离子通量的电势，并且将气体物质提供到反应器室中以与半导体原子组合以形成沉积在工件表面上的分子。

公开(公告)号：US20050211171A1

公开(公告)日：2005-09-29

申请号：US10873474

申请日：2004-06-22

申请人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

发明人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

IPC分类号： C23C16/00 ,  C23C16/04 ,  C23C16/507 ,  H01J37/32

CPC分类号： H01J37/32449 ,  C23C16/045 ,  C23C16/507 ,  H01J37/32357

摘要： A plasma reactor for processing a semiconductor workpiece includes a reactor chamber and an ion shower grid dividing the chamber into an upper ion generation region and a lower process region, the ion shower grid having plural orifices oriented in a non-parallel direction relative to a surface plane of the grid. A workpiece support in the process region has a workpiece support surface in facing relationship to the ion shower grid. The reactor further includes a reactive species source for introducing into the ion generation region a chemical vapor deposition precursor species, a vacuum pump coupled to the process region, a plasma source power applicator for generating a plasma in the ion generation region and a grid potential source coupled to the ion shower grid. The orifices through the grid have an aspect ratio sufficient to limit ion trajectories in the process region to a narrow angular range about the non-parallel direction and a resistance to gas flow sufficient to support a pressure drop of at least a factor of about 4 across the grid.

摘要翻译： 用于处理半导体工件的等离子体反应器包括反应室和将室分成上离子产生区域和下处理区域的离子喷淋栅格，离子喷淋栅格具有相对于表面在非平行方向上取向的多个孔口 电网的平面 在工艺区域中的工件支撑件具有与离子淋浴网格面对的工件支撑表面。 所述反应器还包括用于将化学气相沉积前体物质，耦合到所述工艺区域的真空泵引入所述离子产生区域中的反应物质源，用于在所述离子产生区域中产生等离子体的等离子体源功率施加器和栅极电位源 耦合到离子淋浴网格。 通过电网的孔口具有足以将过程区域中的离子轨迹限制在围绕非平行方向的窄角度范围的宽高比，以及足以支持至少约4倍的压降的气流阻力 电网。

公开(公告)号：US20050211170A1

公开(公告)日：2005-09-29

申请号：US10873463

申请日：2004-06-22

申请人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

发明人： Hiroji Hanawa ,  Tsutomu Tanaka ,  Kenneth Collins ,  Amir Al-Bayati ,  Kartik Ramaswamy ,  Andrew Nguyen

IPC分类号： C23C14/35 ,  C23C16/00 ,  C23C16/04 ,  C23C16/507 ,  H01J37/32

CPC分类号： H01J37/32449 ,  C23C14/358 ,  C23C16/045 ,  C23C16/507 ,  H01J37/32357

摘要： A plasma reactor for processing a semiconductor workpiece includes a reactor chamber and a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower reactor region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, each orifice being oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. A workpiece support in the process region faces the lowermost one of the ion shower grids. A reactive species source furnishes into the ion generation region a chemical vapor deposition precursor species. The reactor further includes a vacuum pump coupled to the reactor region, a plasma source power applicator for generating a plasma in the ion generation region and a grid potential source coupled to the set of ion shower grids. The orifices through at least some of the ion shower grids have an aspect ratio sufficient to limit ion trajectories in the reactor region to a narrow angular range about the non-parallel direction, and a resistance to gas flow sufficient to support a pressure drop between the ion generation and reactor regions of about at least a factor of 4. The grid potential source can be capable of applying different voltages to different ones of the grids.

摘要翻译： 一种用于加工半导体工件的等离子体反应器包括反应室和一组多个并联离子淋浴网格，其将腔室分成上部离子产生区域和下部反应器区域，每个离子淋浴器网格具有相互配准的多个孔口 网格到网格，每个孔口相对于相应的离子喷淋网格的表面平行于非平行方向。 工艺区域中的工件支撑面向最下面的离子淋浴网格。 反应物种源向离子产生区域提供化学气相沉积前体物质。 反应器还包括耦合到反应器区域的真空泵，用于在离子产生区域中产生等离子体的等离子体源功率施加器和耦合到该组离子淋浴栅格的栅极电位源。 通过至少一些离子淋浴栅格的孔口具有足以将反应器区域中的离子轨迹限制在围绕非平行方向的窄角度范围的宽高比，以及足以支持压力降 离子产生和反应器区域至少约为4倍。电网电势源能够对不同的电网施加不同的电压。

公开(公告)号：US20050136604A1

公开(公告)日：2005-06-23

申请号：US11002965

申请日：2004-12-01

申请人： Amir Al-Bayati ,  Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

发明人： Amir Al-Bayati ,  Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

IPC分类号： H01J37/32 ,  H01L21/336

CPC分类号： H01J37/321 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/7843 ,  H01L29/785 ,  H01L29/78618

摘要： A process for conformally doping through the vertical and horizontal surfaces of a 3-dimensional vertical transistor in a semiconductor-on-insulator structure employs an RF oscillating torroidal plasma current to perform either conformal ion implantation, or conformal deposition of a dopant-containing film which can then be heated to drive the dopants into the transistor. Some embodiments employ both conformal ion implantation and conformal deposition of dopant containing films, and in those embodiments in which the dopant containing film is a pure dopant, the ion implantation and film deposition can be performed simultaneously.

摘要翻译： 通过绝缘体上半导体结构中的三维垂直晶体管的垂直和水平表面进行保形掺杂的工艺采用RF振荡环形等离子体电流来执行保形离子注入或含掺杂剂膜的共形沉积 然后可以加热以将掺杂剂驱动到晶体管中。 一些实施例采用包含掺杂剂的膜的共形离子注入和共形沉积，并且在其中含掺杂剂的膜是纯掺杂剂的那些实施例中，可以同时执行离子注入和膜沉积。

公开(公告)号：US20050070073A1

公开(公告)日：2005-03-31

申请号：US10989993

申请日：2004-11-16

申请人： Amir Al-Bayati ,  Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

发明人： Amir Al-Bayati ,  Kenneth Collins ,  Hiroji Hanawa ,  Kartik Ramaswamy ,  Biagio Gallo ,  Andrew Nguyen

IPC分类号： H01J37/32 ,  H01L21/301

CPC分类号： H01L21/76254 ,  C23C14/48 ,  C23C16/507 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32357 ,  H01J37/32412 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/31604 ,  H01L21/318 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L29/6659

摘要： A method of fabricating a semiconductor-on-insulator structure from a pair of semiconductor wafers, includes forming an oxide layer on at least a first surface of a first one of the wafers and performing a bonding enhancement implantation step by ion implantation of a first species in the first surface of at least either of the pair of wafers. The method further includes performing a cleavage ion implantation step on one of the pair of wafers by ion implanting a second species to define a cleavage plane across a diameter of the wafer at the predetermined depth below the top surface of the one wafer. The wafers are then bonded together by placing the first surfaces of the pair of wafers onto one another so as to form an semiconductor-on-insulator structure. The method also includes separating the one wafer along the cleavage plane so as to remove a portion of the one wafer between the second surface and the cleavage plane, whereby to form an exposed cleaved surface of a remaining portion of the one wafer on the semiconductor-on-insulator structure. Finally, the cleaved surface is smoothed, preferably by carrying out a low energy high momentum ion implantation step.

摘要翻译： 一种从一对半导体晶片制造绝缘体上半导体结构的方法包括在第一晶片的至少第一表面上形成氧化物层，并通过离子注入第一种类进行接合增强注入步骤 在所述一对晶片中的至少一个的第一表面中。 所述方法还包括通过离子注入第二种类来在所述一对晶片之一上执行切割离子注入步骤，以在所述晶片的顶部表面下方的预定深度处限定跨所述晶片的直径的解理面。 然后通过将一对晶片的第一表面放置在彼此上而将晶片结合在一起，以形成绝缘体上半导体结构。 该方法还包括沿着解理平面分离一个晶片，以便去除第二表面和解理面之间的一个晶片的一部分，从而形成半导体芯片上的一个晶片的剩余部分的暴露的切割表面， 绝缘体上的结构。 最后，优选通过进行低能量的高动量离子注入步骤来平滑切割的表面。