-
公开(公告)号：US07104944B2
公开(公告)日：2006-09-12
申请号：US10995373
申请日：2004-11-24
IPC分类号： B04B13/00
CPC分类号： B04B9/08 , B04B5/0414 , B04B5/0421 , B04B9/12 , B04B13/00 , B04B13/003
摘要： A centrifugal separator facilitates maintenance with a function that provides the user with useful data for investigating the causes of failures and for preventing their recurrence, such as data needed to determine the appropriate management and replacement frequency of consumable parts. The centrifugal separator also has a storing unit for recording the number of times that the door is opened and closed, operation records of the drive unit by each shaft, and the number of operations performed by operating function, as well as a display unit for displaying the data. The centrifugal separator also includes a function for displaying messages prompting the user to perform maintenance when the aforementioned performance data reach a predetermined value.
摘要翻译： 离心分离器有助于维护，其功能为用户提供有用的数据，用于调查故障原因并防止其复发，例如确定易损件的适当管理和更换频率所需的数据。 离心分离器还具有用于记录门打开和关闭的次数的存储单元，每个轴的驱动单元的操作记录以及由操作功能执行的操作次数以及用于显示的显示单元 数据。 离心分离器还包括当上述性能数据达到预定值时显示提示用户执行维护的消息的功能。
-
92.发明申请公开(公告)号：US20060091299A1
公开(公告)日：2006-05-04
申请号：US11260679
申请日：2005-10-28
申请人： Takashi Inamoto , Koji Ohtaka , Motomi Iyoda , Yujiro Miyata , Ryotaro Kachu , Hiroyuki Takahashi
发明人： Takashi Inamoto , Koji Ohtaka , Motomi Iyoda , Yujiro Miyata , Ryotaro Kachu , Hiroyuki Takahashi
CPC分类号： B60R21/0136 , B60R21/36 , B60R2021/01068 , B60R2021/01095
摘要： A load sensor includes a optical fiber sensor that provides output analog signals in response to shocks of various magnitudes caused by hits by a vehicle on various objects, two or more amplifiers each of which approximates a non linear function of the analog signals and a unit that converts the linear functions into digital data. Therefore, each analog signal either in a lower magnitude range or a higher magnitude range can be amplified by one of the amplifiers that has a more suitable gain, so that the magnitude of the shock can be accurately converted into digital data for a pedestrian protection airbag system.
摘要翻译： 负载传感器包括光纤传感器，其响应于车辆在各种物体上的撞击引起的各种震级的冲击而提供输出模拟信号，两个或更多个放大器各自接近模拟信号的非线性函数，以及单元， 将线性函数转换为数字数据。 因此，具有较低幅度范围或更高幅度范围的每个模拟信号可以由具有更合适增益的放大器中的一个放大，使得可以将冲击的幅度精确地转换成用于行人保护气囊的数字数据 系统。
-
93.发明授权公开(公告)号：US07035154B2
公开(公告)日：2006-04-25
申请号：US10362891
申请日：2001-08-30
CPC分类号： G11C29/50016 , G11C11/401 , G11C29/12 , G11C29/46
摘要： The present invention provides a semiconductor memory device capable of checking operation in the worst case in address combinations, and its manufacturing method. Specific data for test are written into a memory cell array 30. Then, a test signal TE1 is set “1” to set a device in a test mode. Refresh addresses for test are then stored in a data store circuit 51. A first address for test is applied to an address terminal 21, whereby a normal read or write operation is accomplished based on the first address for test. A second address for test is applied to the address terminal 21, whereby a refresh operation is accomplished based on the address for test, and subsequently another normal read or write operation is accomplished based on the second address for test. Data of the memory cell array 30 are checked to decide the presence or absence of any abnormality.
摘要翻译： 本发明提供一种能够在地址组合中的最坏情况下检查操作的半导体存储器件及其制造方法。 用于测试的具体数据被写入存储单元阵列30.然后，将测试信号TE 1设置为“1”以将设备设置在测试模式中。 然后将用于测试的刷新地址存储在数据存储电路51中。用于测试的第一地址被应用于地址终端21，由此基于用于测试的第一地址来完成正常的读取或写入操作。 用于测试的第二地址被应用于地址终端21，由此基于用于测试的地址来完成刷新操作，并且随后基于第二测试地址来完成另一个正常的读取或写入操作。 对存储单元阵列30的数据进行检查，判定有无异常。
-
公开(公告)号：US07023747B2
公开(公告)日：2006-04-04
申请号：US10433130
申请日：2001-11-27
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： G11C7/00
CPC分类号： G11C29/70 , G11C11/4087 , G11C29/846
摘要： It is an object of the present invention to provide a semiconductor memory device with a suitable redundancy circuit and an address conversion circuit, wherein external addresses are allocated to both a memory cell array which needs refresh, typically DRAM and another memory cell array which does not need refresh, typically SRAM. The semiconductor memory device comprises a dynamic memory cell array 11 further comprising an array of a plurality of dynamic memory cells, a static memory cell array 12 further comprising an array of a plurality of static memory cells, a pre-decoder 101 for converting an external address Add into a row pre-decode signal A1 or A2 which corresponds to any memory cell in the dynamic memory cell array 11 or the static memory cell array 12, a redundancy program circuit 103 for specifying a memory cell being to be replaced in the dynamic memory cell array 11, and a second conversion means (redundancy judging circuit) for converting an external address Add, which corresponds to the memory cell specified by the redundancy program circuit 103, into a row pre-decode signal A4, which corresponds to a predetermined memory cell in the static memory cell array 12.
摘要翻译： 本发明的目的是提供一种具有合适的冗余电路和地址转换电路的半导体存储器件，其中外部地址被分配给需要刷新的存储单元阵列，通常是DRAM，而另一个存储单元阵列不需要刷新 需要刷新，通常是SRAM。 半导体存储器件包括动态存储单元阵列11，其还包括多个动态存储器单元的阵列，静态存储单元阵列12还包括多个静态存储单元的阵列，用于转换外部的预解码器101 地址添加到对应于动态存储单元阵列11或静态存储单元阵列12中的任何存储单元的一行预译码信号A 1或A 2，用于指定要更换的存储单元的冗余程序电路103 动态存储单元阵列11和用于将对应于由冗余编程电路103指定的存储单元的外部地址Add转换成行预解码信号A 4的第二转换装置（冗余判定电路），其对应于 到静态存储单元阵列12中的预定存储单元。
-
95.发明申请公开(公告)号：US20060055956A1
公开(公告)日：2006-03-16
申请号：US11226883
申请日：2005-09-14
IPC分类号： G06F3/12
CPC分类号： G06F3/1211 , G06F3/1219 , G06F3/1262 , G06F3/1263 , G06F3/1285
摘要： It enables to construct a flexible device environment in consideration of POD, office and various use environments. To do so, a job processing method is applied to a system including an image processing device capable of executing printing of data of a job of a storage unit capable of storing data of plural jobs including at least one of first job of first processing condition, second job of first processing condition and third job of second processing condition. In the method, it causes the image processing device to finish the printing of the third job after both the printings of first and second jobs are executed, when the image processing device is operated in first sequence, and it causes the image processing device to start the printing of third job before at least the printing of second job is finished, when the image processing device is operated in second sequence.
-
公开(公告)号：US07006401B2
公开(公告)日：2006-02-28
申请号：US10500400
申请日：2002-12-25
申请人： Hiroyuki Takahashi , Takuya Hirota , Noriaki Komatsu , Atsushi Nakagawa , Susumu Takano , Masahiro Yoshida , Yuuji Torige , Hideo Inaba
发明人： Hiroyuki Takahashi , Takuya Hirota , Noriaki Komatsu , Atsushi Nakagawa , Susumu Takano , Masahiro Yoshida , Yuuji Torige , Hideo Inaba
IPC分类号： G11C7/00
CPC分类号： G11C11/40603 , G11C11/406
摘要： Refresh of memory cells is performed periodically by a refresh timer, and collision between memory access and memory refresh is avoided. When memory access occurs, an F/F 163 is set by a one shot pulse from an OS circuit 161, a memory access request is inputted to a memory accessing pulse generator circuit 171 through a NOR gate 167, and a latch control signal LC and an enable signal REN are outputted. When a refresh request from the refresh timer is inputted to an AND gate 168 during the memory access, the output of the NOR gate 167 is at the “L” level, and the refresh request is blocked by the AND gate 168. Thereafter, at the time when the latch control signal LC is turned into the “L” level, F/Fs 163, 164 and 165 are reset, the output of the NOR gate 167 is turned into the “H” level, the refresh request is inputted to a refreshing pulse generator circuit 170, and a refresh enable signal RERF is outputted.
摘要翻译： 通过刷新定时器周期性地执行存储器单元的刷新，并避免存储器访问和存储器刷新之间的冲突。 当存储器访问发生时，通过来自OS电路161的单触发脉冲设置F / F 163，通过NOR门167将存储器访问请求输入到存储器访问脉冲发生器电路171，以及锁存控制信号LC和 输出使能信号REN。 当在存储器访问期间来自刷新定时器的刷新请求被输入到与门168时，或非门167的输出处于“L”电平，刷新请求由与门168阻止。 此后，当锁存控制信号LC变为“L”电平时，F / F 163,164和165被复位，或非门167的输出变为“H”电平，刷新请求 被输入到刷新脉冲发生器电路170，并且输出刷新使能信号RERF。
-
公开(公告)号：US20060039220A1
公开(公告)日：2006-02-23
申请号：US11205194
申请日：2005-08-17
申请人： Hiroyuki Takahashi , Atsushi Nakagawa , Takuya Kera , Masaki Miyata , Yasunari Kawaguchi , Kouichi Gotou
发明人： Hiroyuki Takahashi , Atsushi Nakagawa , Takuya Kera , Masaki Miyata , Yasunari Kawaguchi , Kouichi Gotou
IPC分类号： G11C7/00
CPC分类号： G11C29/12015 , G11C11/401 , G11C11/406 , G11C29/14 , G11C2211/4061
摘要： Disclosed is a semiconductor memory device having memory cells that are in need of refresh for data retention, includes control circuits for necessarily generating the refresh immediately before the read/write operation, and for setting the latency to a first fixed value at all times, for the first mode during the testing, and for necessarily generating the refresh immediately after the read/write operation, and for setting the latency to a second fixed value at all times, for the second mode during the testing.
摘要翻译： 公开了一种具有需要刷新数据保持的存储单元的半导体存储器件，包括在读/写操作之前必须产生刷新的控制电路，并且始终将等待时间设置为第一固定值，以供 在测试期间的第一模式，并且用于在读/写操作之后立即生成刷新，并且用于在测试期间将延迟设置为始终为第二固定值。
-
公开(公告)号：US20060033956A1
公开(公告)日：2006-02-16
申请号：US11248962
申请日：2005-10-12
申请人： Hiroyuki Takahashi
发明人： Hiroyuki Takahashi
IPC分类号： G06F3/12
CPC分类号： H04N1/32529 , G06K15/00 , H04N1/00912 , H04N1/32502 , H04N1/32545 , H04N1/3255 , H04N2201/0081 , H04N2201/0082
摘要： To enable a large amount of printing jobs to be efficiently carried out with low running costs, thereby preventing inconveniences such as complicated operations required of an operator, generating desired data for the operator, and allowing the operator to work more efficiently, an image processing system comprising a plurality of image forming apparatuses is provided, control is provided such that a group of image data to be printed are separated into a plurality of groups and transmitting the groups to the plurality of image forming apparatuses, image processes are executed on the image data to be transmitted depending on printing attributes of the image forming apparatuses to which the image data are to be transmitted, in a manner such that different processes are executed for respective ones of the groups and the image data that have been processed for the respective ones of the groups are transmitted to respective corresponding ones of the image forming apparatuses. Further, a first image forming apparatus is controlled to form images on sheets with image data of a group of image data which are for pages corresponding to image data having a first attribute, the group of image data including the image data having the first attribute, and image data having a second attribute, and a second image forming apparatus is controlled to form images on sheets with image data for pages corresponding to the image data having the second attribute. The first image forming apparatus is controlled to operate by selecting one of a plurality of operation modes depending on a command from a user, the operation modes including an insertion mode in which image data of the group of image data which are for the pages corresponding to the image data having the first attribute are formed on sheets from a first feeding unit while sheets from another feeding unit which is different from the first feeding unit are inserted into pages at positions corresponding to image data of the group of image data which have the second attribute, and a non-insertion mode in which image data of the group of image data which are for the pages corresponding to the image data having the first attribute are formed on sheets from the first feeding unit while the control means inhibits insertion of sheets from the another feeding unit which is different from the first feeding unit into the pages at the positions corresponding to the image data of the group of image data which have the second attribute.
-
公开(公告)号：US06992385B2
公开(公告)日：2006-01-31
申请号：US10755375
申请日：2004-01-13
IPC分类号： H01L23/48
CPC分类号： H01L24/97 , H01L23/3107 , H01L23/49548 , H01L23/49562 , H01L24/40 , H01L24/41 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/05571 , H01L2224/05573 , H01L2224/16245 , H01L2224/32245 , H01L2224/40137 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73207 , H01L2224/73221 , H01L2224/73253 , H01L2224/73255 , H01L2224/73265 , H01L2224/83801 , H01L2224/8385 , H01L2224/84801 , H01L2224/8485 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2224/83 , H01L2224/81 , H01L2924/00 , H01L2224/05599 , H01L2924/00012 , H01L2224/37099
摘要： A novel semiconductor device high in both heat dissipating property and connection reliability in mounting is to be provided. The semiconductor device comprises a semiconductor chip, a resin sealing member for sealing the semiconductor chip, a first conductive member connected to a first electrode formed on a first main surface of the semiconductor chip, and a second conductive member connected to a second electrode formed on a second main surface opposite to the first main surface of the semiconductor chip, the first conductive member being exposed from a first main surface of the resin sealing member, and the second conductive member being exposed from a second main surface opposite to the first main surface of the resin sealing member and also from side faces of the resin sealing member.
-
100.发明申请公开(公告)号：US20050216676A1
公开(公告)日：2005-09-29
申请号：US11133974
申请日：2005-05-20
IPC分类号： G11C11/401 , G11C7/10 , G11C11/403 , G11C11/406 , G06F13/00
CPC分类号： G11C7/1045
摘要： There is provided a method of entry of an operation mode of a semiconductor memory during operations without need of any specific timing specification and with effective suppression to any erroneous entry. If read cycles for plural addresses are continued, then a request for entry of operation mode is accepted (steps S1 and S2). In write cycles following to those read cycles, an operation mode to be entered is decided based on data externally designated, wherein in the first write cycle, the kind of the operation mode is set, and then in the next write cycle, conditions for the operation mode are set for the entry of the operation mode of the semiconductor memory.
摘要翻译： 提供了一种在操作期间输入半导体存储器的操作模式的方法，而不需要任何特定的时序指定并有效抑制任何错误的输入。 如果持续多个地址的读取周期，则接受进入操作模式的请求（步骤S1和S2）。 在这些读取周期之后的写入周期中，基于外部指定的数据来决定要输入的操作模式，其中在第一写入周期中，设置操作模式的种类，然后在下一个写入周期中， 操作模式被设置用于输入半导体存储器的操作模式。
-
-
-
-
-
-
-
-
-
搜索结果
796 条记录 (耗时 0.064 秒)