公开(公告)号：US20110048516A1

公开(公告)日：2011-03-03

申请号：US12713581

申请日：2010-02-26

申请人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Davood Shahrjerdi

IPC分类号： H01L31/10 ,  H01L31/0216

CPC分类号： H01L31/068 ,  H01L31/0725 ,  H01L31/074 ,  H01L31/075 ,  H01L31/076 ,  H01L31/184 ,  H01L31/1892 ,  Y02E10/547 ,  Y02E10/548

摘要： A method for fabrication of a multijunction photovoltaic (PV) cell includes providing a stack comprising a plurality of junctions on a substrate, each of the plurality of junctions having a respective bandgap, wherein the plurality of junctions are ordered from the junction having the smallest bandgap being located on the substrate to the junction having the largest bandgap being located on top of the stack; forming a top metal layer, the top metal layer having a tensile stress, on top of the junction having the largest bandgap; adhering a top flexible substrate to the metal layer; and spalling a semiconductor layer from the substrate at a fracture in the substrate, wherein the fracture is formed in response to the tensile stress in the top metal layer.

摘要翻译： 制造多结光伏（PV）电池的方法包括在衬底上提供包括多个结的叠层，所述多个结中的每一个具有相应的带隙，其中所述多个结从具有最小带隙的结点排序 位于具有最大带隙位于堆叠顶部的基底上的基底上; 在具有最大带隙的结的顶部上形成顶部金属层，顶部金属层具有拉伸应力; 将顶部柔性基底粘附到金属层上; 并且在基板的断裂处从基板剥离半导体层，其中响应于顶部金属层中的拉伸应力形成断裂。

公开(公告)号：US20100310775A1

公开(公告)日：2010-12-09

申请号：US12713560

申请日：2010-02-26

申请人： Stephen W. Bedell ,  Keith E. Fogel ,  Paul A. Lauro ,  Devendra Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Keith E. Fogel ,  Paul A. Lauro ,  Devendra Sadana ,  Davood Shahrjerdi

IPC分类号： B05D3/02

CPC分类号： H01L31/075 ,  H01L21/02002 ,  H01L31/0725 ,  H01L31/074 ,  H01L31/076 ,  H01L31/184 ,  H01L31/1892 ,  Y02E10/548

摘要： A method for spalling a layer from an ingot of a semiconductor substrate includes forming a metal layer on the ingot of the semiconductor substrate, wherein a tensile stress in the metal layer is configured to cause a fracture in the ingot; and removing the layer from the ingot at the fracture. A system for spalling a layer from an ingot of a semiconductor substrate includes a metal layer formed on the ingot of the semiconductor substrate, wherein a tensile stress in the metal layer is configured to cause a fracture in the ingot, and wherein the layer is configured to be removed from the ingot at the fracture.

摘要翻译： 从半导体衬底的锭剥落层的方法包括在半导体衬底的锭上形成金属层，其中金属层中的拉伸应力构造成在晶锭中引起断裂; 并在断裂处从锭中去除层。 用于从半导体衬底的锭剥落层的系统包括形成在半导体衬底的锭上的金属层，其中金属层中的拉伸应力被配置为引起锭中的断裂，并且其中该层被配置 在断裂处从锭中移除。

公开(公告)号：US20100307591A1

公开(公告)日：2010-12-09

申请号：US12713572

申请日：2010-02-26

申请人： Stephen W. Bedell ,  Norma E. Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Davood Shahrjerdi ,  Brent A. Wacaser

发明人： Stephen W. Bedell ,  Norma E. Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Davood Shahrjerdi ,  Brent A. Wacaser

IPC分类号： H01L31/0304 ,  H01L31/18

CPC分类号： H01L31/0304 ,  H01L31/0725 ,  H01L31/074 ,  H01L31/075 ,  H01L31/076 ,  H01L31/184 ,  H01L31/1892 ,  Y02E10/548

摘要： A method for forming a single-junction photovoltaic cell includes forming a dopant layer on a surface of a semiconductor substrate; diffusing the dopant layer into the semiconductor substrate to form a doped layer of the semiconductor substrate; forming a metal layer over the doped layer, wherein a tensile stress in the metal layer is configured to cause a fracture in the semiconductor substrate; removing a semiconductor layer from the semiconductor substrate at the fracture; and forming the single junction photovoltaic cell using the semiconductor layer. A single-junction photovoltaic cell includes a doped layer comprising a dopant diffused into a semiconductor substrate; a patterned conducting layer formed on the doped layer; a semiconductor layer comprising the semiconductor substrate located on the doped layer on a surface of the doped layer opposite the patterned conducting layer; and an ohmic contact layer formed on the semiconductor layer.

摘要翻译： 一种形成单结光伏电池的方法包括在半导体衬底的表面上形成掺杂剂层; 将掺杂剂层扩散到半导体衬底中以形成半导体衬底的掺杂层; 在所述掺杂层上形成金属层，其中所述金属层中的拉伸应力构造成在所述半导体衬底中引起断裂; 在断裂时从半导体衬底去除半导体层; 以及使用半导体层形成单结光伏电池。 单结光伏电池包括掺杂剂，该掺杂层包含扩散到半导体衬底中的掺杂剂; 形成在掺杂层上的图案化导电层; 半导体层，其包括位于掺杂层的与图案化导电层相对的表面上的掺杂层上的半导体衬底; 以及形成在半导体层上的欧姆接触层。

公开(公告)号：US08823127B2

公开(公告)日：2014-09-02

申请号：US13614953

申请日：2012-09-13

申请人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Davood Shahrjerdi

IPC分类号： H01L31/06 ,  H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L29/80 ,  H01L31/112

CPC分类号： H01L31/068 ,  H01L31/0725 ,  H01L31/074 ,  H01L31/075 ,  H01L31/076 ,  H01L31/184 ,  H01L31/1892 ,  Y02E10/547 ,  Y02E10/548

摘要： A multijunction photovoltaic (PV) cell includes a bottom flexible substrate and a bottom metal layer located on the bottom flexible substrate. The multijunction photovoltaic cell also includes a semiconductor layer located on the bottom metal layer and a stack having a plurality of junctions located on the semiconductor layer, each of the plurality of junctions having a respective bandgap. The pluralities of junctions are ordered from the junction having the smallest bandgap being located on the substrate to the junction having the largest bandgap being located on top of the stack.

摘要翻译： 多结光伏（PV）电池包括底部柔性基底和位于底部柔性基底上的底部金属层。 所述多结光伏电池还包括位于所述底部金属层上的半导体层和具有位于所述半导体层上的多个结的叠层，所述多个结中的每一个具有相应的带隙。 多个接合点从具有位于衬底上的最小带隙的接合点排列到具有位于堆叠顶部的最大带隙的接合点。

公开(公告)号：US08530337B1

公开(公告)日：2013-09-10

申请号：US13530605

申请日：2012-06-22

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  John A. Ott ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  John A. Ott ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L21/304

CPC分类号： H01L22/12 ,  H01L21/304 ,  H01L21/7806 ,  H01L21/7813

摘要： Methods for detecting the physical layout of an integrated circuit are provided. The methods of the present disclosure allow large area imaging of the circuit layout without requiring tedious sample preparation techniques. The imaging can be performed utilizing low-energy beam techniques such as scanning electron microscopy; however, more sophisticated imaging techniques can also be employed. In the methods of the present disclosure, spalling is used to remove a portion of a semiconductor layer including at least one semiconductor device formed thereon or therein from a base substrate. In some cases, a buried insulator layer that is located beneath a semiconductor layer including the at least one semiconductor device can be completely or partially removed. In some cases, the semiconductor layer including the at least one semiconductor device can be thinned. The methods improve the detection quality that the buried insulator layer and a thick semiconductor layer can reduce.

公开(公告)号：US08518807B1

公开(公告)日：2013-08-27

申请号：US13530637

申请日：2012-06-22

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L21/00

CPC分类号： H01L21/31155 ,  H01L21/304 ,  H01L21/7624

摘要： An SOI substrate including a buried insulator layer positioned between a base substrate and a top semiconductor active layer is first provided. A semiconductor device can then be formed on and/or within a portion of the top semiconductor active layer. A bottommost surface of the buried insulator layer which is opposite a topmost surface of the buried insulator layer that forms an interface with the top semiconductor active layer can be then exposed. Ions can then be implanted through the bottommost surface of the buried insulator layer and into a portion of the buried insulator layer. The ions are implanted at energy ranges that do not disturb the buried insulator layer/top semiconductor active layer interface, while leaving a relatively thin portion of the buried insulator layer near the buried insulator layer/top semiconductor active layer interface intact.

公开(公告)号：US20100307572A1

公开(公告)日：2010-12-09

申请号：US12713584

申请日：2010-02-26

申请人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Ghavam Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Ghavam Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L31/00 ,  H01L31/18

CPC分类号： H01L31/0304 ,  H01L21/20 ,  H01L21/76254 ,  H01L31/03762 ,  H01L31/0725 ,  H01L31/074 ,  H01L31/075 ,  H01L31/076 ,  H01L31/184 ,  H01L31/1892 ,  H01L31/20 ,  Y02E10/548

摘要： A method for forming a heterojunction III-V photovoltaic (PV) cell includes performing layer transfer of a base layer from a wafer of a III-V substrate, the base layer being less than about 20 microns thick; forming an intrinsic layer on the base layer; forming an amorphous silicon layer on the intrinsic layer; and forming a transparent conducting oxide layer on the amorphous silicon layer. A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.

摘要翻译： 用于形成异质结III-V光伏（PV）电池的方法包括从III-V基片的晶片执行基底层的层转移，所述基底层小于约20微米厚; 在基层上形成本征层; 在本征层上形成非晶硅层; 以及在所述非晶硅层上形成透明导电氧化物层。 异质结III-V光伏（PV）电池包括包含III-V衬底的基层，所述基层小于约20微米厚; 位于基层上的本征层; 位于本征层上的非晶硅层; 以及位于非晶硅层上的透明导电氧化物层。

公开(公告)号：US09041167B2

公开(公告)日：2015-05-26

申请号：US13555271

申请日：2012-07-23

申请人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Bahman Hekmatshoartabari ,  Ali Khakifirooz ,  Ghavam G. Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L21/00 ,  H01L21/3115 ,  H01L21/762

CPC分类号： H01L21/31155 ,  H01L21/304 ,  H01L21/7624

摘要： An SOI substrate including a buried insulator layer positioned between a base substrate and a top semiconductor active layer is first provided. A semiconductor device can then be formed on and/or within a portion of the top semiconductor active layer. A bottommost surface of the buried insulator layer which is opposite a topmost surface of the buried insulator layer that forms an interface with the top semiconductor active layer can be then exposed. Ions can then be implanted through the bottommost surface of the buried insulator layer and into a portion of the buried insulator layer. The ions are implanted at energy ranges that do not disturb the buried insulator layer/top semiconductor active layer interface, while leaving a relatively thin portion of the buried insulator layer near the buried insulator layer/top semiconductor active layer interface intact.

摘要翻译： 首先提供包括位于基底基板和顶部半导体有源层之间的掩埋绝缘体层的SOI衬底。 然后可以在顶部半导体有源层的一部分上和/或内部形成半导体器件。 掩埋绝缘体层的与埋入绝缘体层的与顶部半导体活性层形成界面的最上表面相对的最底表面可以暴露。 然后，离子可以通过掩埋绝缘体层的最底部的表面注入埋入的绝缘体层的一部分中。 将离子注入到不会干扰埋入的绝缘体层/顶部半导体有源层界面的能量范围内，同时在掩埋的绝缘体层/顶部半导体活性层界面附近保留相当薄的部分隐埋绝缘体层。

公开(公告)号：US08802477B2

公开(公告)日：2014-08-12

申请号：US12713584

申请日：2010-02-26

申请人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Ghavam Shahidi ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Ghavam Shahidi ,  Davood Shahrjerdi

IPC分类号： H01L21/00 ,  H01L21/30 ,  H01L21/46 ,  H01L21/762 ,  H01L21/20 ,  H01L31/0304

CPC分类号： H01L31/0304 ,  H01L21/20 ,  H01L21/76254 ,  H01L31/03762 ,  H01L31/0725 ,  H01L31/074 ,  H01L31/075 ,  H01L31/076 ,  H01L31/184 ,  H01L31/1892 ,  H01L31/20 ,  Y02E10/548

摘要： A method for forming a heterojunction III-V photovoltaic (PV) cell includes performing layer transfer of a base layer from a wafer of a III-V substrate, the base layer being less than about 20 microns thick; forming an intrinsic layer on the base layer; forming an amorphous silicon layer on the intrinsic layer; and forming a transparent conducting oxide layer on the amorphous silicon layer. A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.

摘要翻译： 用于形成异质结III-V光伏（PV）电池的方法包括从III-V衬底的晶片执行基底层的层转移，所述基底层小于约20微米厚; 在基层上形成本征层; 在本征层上形成非晶硅层; 以及在所述非晶硅层上形成透明导电氧化物层。 异质结III-V光伏（PV）电池包括包含III-V衬底的基层，所述基层小于约20微米厚; 位于基层上的本征层; 位于本征层上的非晶硅层; 以及位于非晶硅层上的透明导电氧化物层。

公开(公告)号：US20130000708A1

公开(公告)日：2013-01-03

申请号：US13614953

申请日：2012-09-13

申请人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Davood Shahrjerdi

发明人： Stephen W. Bedell ,  Norma Sosa Cortes ,  Keith E. Fogel ,  Devendra Sadana ,  Davood Shahrjerdi

IPC分类号： H01L31/06

CPC分类号： H01L31/068 ,  H01L31/0725 ,  H01L31/074 ,  H01L31/075 ,  H01L31/076 ,  H01L31/184 ,  H01L31/1892 ,  Y02E10/547 ,  Y02E10/548

摘要： A multijunction photovoltaic (PV) cell includes a bottom flexible substrate and a bottom metal layer located on the bottom flexible substrate. The multijunction photovoltaic cell also includes a semiconductor layer located on the bottom metal layer and a stack having a plurality of junctions located on the semiconductor layer, each of the plurality of junctions having a respective bandgap. The pluralities of junctions are ordered from the junction having the smallest bandgap being located on the substrate to the junction having the largest bandgap being located on top of the stack.

摘要翻译： 多结光伏（PV）电池包括底部柔性基底和位于底部柔性基底上的底部金属层。 所述多结光伏电池还包括位于所述底部金属层上的半导体层和具有位于所述半导体层上的多个结的叠层，所述多个结中的每一个具有相应的带隙。 多个接合点从具有位于衬底上的最小带隙的接合点排列到具有位于堆叠顶部的最大带隙的接合点。