公开(公告)号：US5780348A

公开(公告)日：1998-07-14

申请号：US892314

申请日：1997-07-14

Applicant: Tony Lin ,  Water Lur ,  Shih-Wei Sun

Inventor： Tony Lin ,  Water Lur ,  Shih-Wei Sun

IPC: H01L21/336 ,  H01L21/283

CPC classification number: H01L29/6659 ,  H01L29/665

Abstract: A method of making a self-aligned silicide component having parasitic spacers formed on the sides of an upper surface of the component isolating regions, the bottom sides of the spacers and the exposed sides of the gate regions, which increases a distance from a metal silicide layer at a corner of an active region neighboring the component isolating region to the source/drain junction, to prevent undesired current leakages. The formation of parasitic spacers increases a distance from the metal silicide layer lying above the gate surface to the metal silicide layer lying above the source/drain surface so that an ability to withstand electrostatic damages is enhanced.

Abstract translation: 一种制造具有寄生间隔物的自对准硅化物组分的方法，其形成在部件隔离区域的上表面的侧面上，间隔物的底侧和栅极区域的暴露侧，其增加了距金属硅化物的距离 在与源极/漏极结的部件隔离区域相邻的有源区域的拐角处的层，以防止不期望的电流泄漏。 寄生间隔物的形成增加了位于栅极表面上方的金属硅化物层到位于源极/漏极表面上方的金属硅化物层的距离，从而增强了承受静电损伤的能力。