公开(公告)号：US10964585B2

公开(公告)日：2021-03-30

申请号：US16537123

申请日：2019-08-09

申请人： Semiconductor Manufacturing International (Beijing) Corporation ,  Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Zhang Tianhao ,  Wu Yichao

IPC分类号： H01L21/76 ,  H01L21/762 ,  H01L29/66 ,  H01L21/311 ,  H01L29/78 ,  H01L21/02 ,  H01L29/06 ,  H01L21/306 ,  H01L21/308 ,  H01L21/3065 ,  H01L21/8238

摘要： Disclosed are a semiconductor structure and a method for forming same. One form of the forming method includes: providing a base, including a substrate and a fin protruding out of the substrate, where a fin mask layer is formed on the top of the fin, and the base includes a graphics-intensive region and a graphics-sparse region; forming an isolation material layer on the substrate exposed by the fin, to expose a top of the fin mask layer; performing first etching processing on the isolation material layer, where a residual isolation material layer covers a partial sidewall of the fin mask layer, and a top of the residual isolation material layer located on the graphics-sparse region is lower than a top of the residual isolation material layer located on the graphics-intensive region; removing the fin mask layer after the first etching processing is performed; and performing second etching processing on the residual isolation material layer using an isotropic dry etching process after the fin mask layer is removed, where the etched isolation material layer is used as an isolation layer, and the isolation layer covers a partial sidewall of the fin. Embodiments of the present disclosure help to improve the height consistency of the tops of isolation layers located on different graphics density regions, thereby improving the performance of the semiconductor structure.

公开(公告)号：US20210090960A1

公开(公告)日：2021-03-25

申请号：US17022364

申请日：2020-09-16

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Song BAI ,  Qi Liang MA ,  Tao SONG ,  Xuan LI

IPC分类号： H01L21/8238 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

摘要： A semiconductor structure and its fabrication method are provided in the present disclosure. The method includes providing a layer to-be-etched, including first regions and second regions. The method further includes forming a plurality of discrete first sacrificial layers on the layer to-be-etched, where a plurality of openings is between the plurality of first sacrificial layers and includes first openings on the first regions. The method further includes forming initial sidewall spacer structures on sidewalls of the plurality of first sacrificial layers, where the initial sidewall spacer structures include first sidewall spacers, and the first sidewall spacers fill the first openings. The method further includes, using the first sidewall spacers as an alignment mark, forming a first mask layer on the layer to-be-etched and the initial sidewall spacer structures, where the first mask layer exposes a portion of the layer to-be-etched and a portion of the initial sidewall spacer structures.

公开(公告)号：US20210090890A1

公开(公告)日：2021-03-25

申请号：US17023940

申请日：2020-09-17

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Qian Jiang ZHANG ,  Bo SU ,  Tao DOU ,  Lin Lin SUN

IPC分类号： H01L21/033

摘要： A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes providing a to-be-etched layer; forming an initial mask layer over the to-be-etched layer; forming a patterned structure, on the initial mask layer and exposing a portion of the initial mask layer; forming a barrier layer on a sidewall surface of the patterned structure; using the patterned structure and the barrier layer as a mask, performing an ion doping process on the initial mask layer to form a doped region and an un-doped region between doped regions in the initial mask layer; removing the patterned structure and the barrier layer; and forming a mask layer on a top surface of the to-be-etched layer by removing the un-doped region. The mask layer includes a first opening exposing the top surface of the to-be-etched layer.

公开(公告)号：US10943912B2

公开(公告)日：2021-03-09

申请号：US16403251

申请日：2019-05-03

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Yong Li

IPC分类号： H01L27/11 ,  H01L21/8238 ,  H01L27/02 ,  H01L27/092 ,  H01L29/423

摘要： A semiconductor device includes a base substrate including an NMOS region and a PMOS region. The PMOS region includes a first P-type region and a second P-type region. The semiconductor device also includes an interlayer dielectric layer, a gate structure formed through the interlayer dielectric layer and including an N-type region gate structure formed in the NMOS region, a first gate structure formed in the first P-type region and connected to the N-type region gate structure, and a second gate structure formed in the second P-type region and connected to the first gate structure. The direction from the N-type region gate structure to the second gate structure is an extending direction of the gate structure, and along a direction perpendicular to the extending direction of the gate structure, the width of the first gate structure is larger than the width of the second gate structure.

公开(公告)号：US20210066462A1

公开(公告)日：2021-03-04

申请号：US17004937

申请日：2020-08-27

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Qingchun ZHANG

IPC分类号： H01L29/417 ,  H01L29/08 ,  H01L29/45 ,  H01L29/40 ,  H01L21/02 ,  H01L21/306 ,  H01L21/308 ,  H01L21/265 ,  H01L21/285

摘要： Semiconductor structures and fabrication methods thereof are provided. The method includes: providing a substrate, the substate having a first opening; forming a first epitaxial layer in the first opening, the first epitaxial layer having a second opening; forming a stop layer on sidewall surfaces and a bottom surface of the second opening; forming a second epitaxial layer on a top surface of the stop layer; after forming the second epitaxial layer, forming a dielectric layer on the substrate, the dielectric layer having a third opening exposing a surface of the second epitaxial layer; forming a fourth opening in the second epitaxial layer by etching the second epitaxial layer exposed by the third opening until the stop layer is exposed; and forming a contact layer on sidewall surfaces and a bottom surface of the fourth opening by performing a semiconductor metallization process.

公开(公告)号：US20210050258A1

公开(公告)日：2021-02-18

申请号：US16989299

申请日：2020-08-10

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Hailong YU ,  Jingjing TAN ,  Hao ZHANG

IPC分类号： H01L21/768 ,  H01L23/532 ,  H01L23/535

摘要： A method for forming a semiconductor structure includes providing an initial semiconductor structure formed in a substrate; forming a dielectric layer on the substrate; forming a first opening in the dielectric layer to expose a portion of the initial semiconductor structure; etching the portion of the initial semiconductor structure exposed at a bottom of the first opening to form a second opening in the initial semiconductor structure; and forming a contact layer in the second opening and a third opening in the contact layer. The contact layer has a concave top surface, and the third opening is located above the concave top surface of the contact layer and under the first opening. The method further includes forming a conductive structure in the first opening and the third opening.

公开(公告)号：US10916479B2

公开(公告)日：2021-02-09

申请号：US16118010

申请日：2018-08-30

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  SMIC New Technology Research and Development (Shanghai) Corporation

发明人： Fei Zhou

IPC分类号： H01L21/76 ,  H01L21/8238 ,  H01L21/762 ,  H01L29/66 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/28 ,  H01L21/8234

摘要： Semiconductor device and fabrication method are provided. The method includes: providing a semiconductor substrate; forming initial fins on the semiconductor substrate; forming a gate structure material layer on the semiconductor substrate and the initial fins, the gate material layer having a top surface higher than the initial fins; forming a trench in the gate structure material layer and the initial fins, which passes through the initial fins along a direction perpendicular to an extending direction of initial fins and in parallel with a surface of the semiconductor substrate to form initial fins into fins; forming an isolation layer in the trench having a top surface higher than the fins; and forming gate structures on both sides of the isolation layer by etching the gate structure material layer.

公开(公告)号：US20210036146A1

公开(公告)日：2021-02-04

申请号：US16862987

申请日：2020-04-30

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Fei ZHOU

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/10

摘要： A semiconductor structure and a method for forming the same are provided. One form of the method includes: providing a base, where a channel stack and a tear-off structure span the channel stack being formed on the base, and the channel stack including a sacrificial layer and a channel layer; forming a groove in channel stacks on both sides of a gate structure; laterally etching the sacrificial layer exposed from the groove to form a remaining sacrificial layer; forming a source/drain doped region in the channel layer exposed from the remaining sacrificial layer; forming an interlayer dielectric layer on the base; etching the interlayer dielectric layer on one side of the source region to expose a surface of the channel layer corresponding to the source region; etching the interlayer dielectric layer on one side of the drain region to expose the surface of the channel layer corresponding to the drain region; forming a first metal silicide layer on a surface of the channel layer corresponding to the source region; forming a second metal silicide layer on a surface of the channel layer corresponding to the drain region; forming a first conductive plug covering the first metal silicide layer and a second conductive plug covering the second metal silicide layer. In the present disclosure, contact resistance of the first conductive plug, the second conductive plug, and the source/drain doped region is reduced.

公开(公告)号：US20210035803A1

公开(公告)日：2021-02-04

申请号：US16818051

申请日：2020-03-13

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： Zhao JUNHONG ,  Zhao HAI

IPC分类号： H01L21/033

摘要： A semiconductor structure and a method for forming the same are provided. In one form, the method includes: providing a base, where a bottom core material layer is formed on the base, a plurality of discrete top core layers is formed on the bottom core material layer, an area between top core layers of the plurality of adjacent top core layers is a groove, and the groove includes a connecting groove; forming a first spacer film conformally covering the plurality of discrete top core layers and the bottom core material layer; forming a blocking structure in a remainder of the connecting groove exposed from the first spacer film; removing first spacer films on a top of the top core layers of the plurality of discrete top core layers and on the bottom core material layer using the blocking structure as a mask, to form a first mask spacer; removing the plurality of top core layers; patterning the bottom core material layer using the first mask spacer and the blocking structure as a mask, to form a bottom core layer; forming a second mask spacer on a side wall of the bottom core layer; and removing the bottom core layer. Through the blocking structure, a bottom core layer at a position corresponding to the connecting groove has a relatively large width, thereby directly forming target patterns with different spacings.

公开(公告)号：US20210021938A1

公开(公告)日：2021-01-21

申请号：US17061363

申请日：2020-10-01

申请人： Semiconductor Manufacturing International (Shanghai) Corporation ,  Semiconductor Manufacturing International (Beijing) Corporation

发明人： GuangCai FU

IPC分类号： H04R19/04 ,  H04R19/00 ,  H04R1/04 ,  H04R31/00

摘要： A microphone and its manufacturing method, relating the semiconductor techniques, are presented. The microphone comprises: a substrate comprising an opening, a first electrode layer at the bottom of the opening, and at least one groove adjacent to the first electrode layer, with the groove and the opening on two opposing sides of a bottom surface of the first electrode layer; a separation material layer filling the groove; and a second electrode layer on the separation material layer, wherein the first electrode layer, the separation material layer, and the second electrode layer form a cavity. In this inventive concept, the separation material layer on the groove works as an anchor node embedding in the substrate to increases the effective contact area and the bonding power, and to improve the bonding quality between the second electrode layer and the substrate, which results in a strengthened second electrode layer.