公开(公告)号：US4393457A

公开(公告)日：1983-07-12

申请号：US247676

申请日：1981-03-26

申请人： Bernard J. New

发明人： Bernard J. New

IPC分类号： G06F17/14 ,  G06F15/34

CPC分类号： G06F17/142

摘要： An apparatus and method for generating a specific sequence of addresses of values of an array stored in a digital memory. The addresses are generated by a first counter which generates a seed value and a second counter which generates a control value, the control value controlling a bit inserter and a programmable shifter to set, respectively, the bit place position of bit insertion and the amount of shift. The output of the bit inserter is the row position of related addresses for butterfly operation of a fast Fourier transform array. The output of the shifter is the address of coefficients associated with the complex rotation of the butterfly operation. The apparatus is an integrated circuit intended for use as a modular integrated circuit in connection with digital memory means and central processing means including a digital multiplying means.

摘要翻译： 一种用于生成存储在数字存储器中的阵列的值的特定地址序列的装置和方法。 地址由产生种子值的第一计数器和产生控制值的第二计数器，控制位插入器的控制值和可编程移位器分别设置位插入的位位置和量 转移。 位插入器的输出是用于快速傅立叶变换阵列的蝶形运算的相关地址的行位置。 移位器的输出是与蝶形运算的复数旋转相关联的系数的地址。 该装置是旨在用作与数字存储装置和包括数字乘法装置的中央处理装置相结合的模块化集成电路的集成电路。