公开(公告)号：US5229325A

公开(公告)日：1993-07-20

申请号：US758603

申请日：1991-09-12

Applicant: Jong-Ho Park ,  Deok-Min Lee ,  Sang-in Lee

Inventor： Jong-Ho Park ,  Deok-Min Lee ,  Sang-in Lee

IPC: H01L21/768

CPC classification number: H01L21/76877 ,  H01L21/7684

Abstract: A method for forming metal wires of a semiconductor device includes the steps of first forming about half of the total metal wires, the wires being arranged at regular intervals, forming sidewall spacers made of insulating materials on the metal wires using an etchback method, and forming the rest of the total wires at spaces between the wires of the first half, again using an etchback process. This results in a wire structure in which a gap between adjacent metal wires is about 0.1 microns in width.

Abstract translation: 用于形成半导体器件的金属线的方法包括以下步骤：首先形成总金属线的大约一半，电线以规则的间隔布置，使用回蚀法在金属线上形成由绝缘材料制成的侧壁隔离物，以及形成 在上半部分的电线之间的间隔处的总线的其余部分再次使用回蚀工艺。 这导致相邻金属线之间的间隙宽度为约0.1微米的线结构。