ENCODING BLOCKS IN VIDEO FRAMES CONTAINING TEXT USING HISTOGRAMS OF GRADIENTS
    151.
    发明申请
    ENCODING BLOCKS IN VIDEO FRAMES CONTAINING TEXT USING HISTOGRAMS OF GRADIENTS 有权
    使用纹理组织在包含文本的视频框架中编码块

    公开(公告)号:US20160014421A1

    公开(公告)日:2016-01-14

    申请号:US14331091

    申请日:2014-07-14

    Applicant: APPLE INC.

    Abstract: A block input component of a video encoding pipeline may, for a block of pixels in a video frame, compute gradients in multiple directions, and may accumulate counts of the computed gradients in one or more histograms. The block input component may analyze the histogram(s) to compute block-level statistics and determine whether a dominant gradient direction exists in the block, indicating the likelihood that it represents an image containing text. If text is likely, various encoding parameter values may be selected to improve the quality of encoding for the block (e.g., by lowering a quantization parameter value). The computed statistics or selected encoding parameter values may be passed to other stages of the pipeline, and used to bias or control selection of a prediction mode, an encoding mode, or a motion vector. Frame-level or slice-level parameter values may be generated from gradient histograms of multiple blocks.

    Abstract translation: 对于视频帧中的像素块,视频编码流水线的块输入分量可以在多个方向上计算梯度,并且可以在一个或多个直方图中累积计算的梯度的计数。 块输入组件可以分析直方图以计算块级统计,并确定块中是否存在显性梯度方向,指示它代表包含文本的图像的可能性。 如果文本很可能,则可以选择各种编码参数值以提高块的编码质量(例如,通过降低量化参数值)。 所计算的统计量或所选择的编码参数值可以被传递到流水线的其他阶段,并且用于偏置或控制预测模式,编码模式或运动矢量的选择。 可以从多个块的梯度直方图生成帧级或片级参数值。

    SKIP THRESHOLDING IN PIPELINED VIDEO ENCODERS
    152.
    发明申请
    SKIP THRESHOLDING IN PIPELINED VIDEO ENCODERS 有权
    在管道视频编码器中跳过阈值

    公开(公告)号:US20150092855A1

    公开(公告)日:2015-04-02

    申请号:US14039871

    申请日:2013-09-27

    Applicant: Apple Inc.

    Abstract: The video encoders described herein may make an initial determination to designate a macroblock as a skip macroblock, but may subsequently reverse that decision based on additional information. For example, an initial skip mode decision may be based on aggregate distortion metrics for the luma component of the macroblock (e.g., SAD, SATD, or SSD), then reversed based on an individual pixel difference metric, an aggregate or individual pixel metric for a chroma component of the macroblock, or on the position of the macroblock within a macroblock row. The final skip mode decision may be based, at least in part, on the maximum difference between any pixel in the macroblock (or in a region of interest within the macroblock) and the corresponding pixel in a reference frame. The initial skip mode decision may be made during an early stage of a pipelined video encoding process and reversed in a later stage.

    Abstract translation: 本文描述的视频编码器可以进行初始确定以将宏块指定为跳过宏块,但是随后可以基于附加信息来反转该决定。 例如,初始跳过模式决定可以基于宏块的亮度分量(例如,SAD,SATD或SSD)的聚合失真度量,然后基于单独的像素差异度量来反转,聚合或单独的像素度量用于 宏块的色度分量,或宏块行内宏块的位置。 至少部分地,最终跳过模式决定基于宏块中的任何像素(或宏块内的感兴趣区域)与参考帧中的相应像素之间的最大差异。 初始跳过模式决定可以在流水线视频编码处理的早期阶段进行,并且在稍后的阶段中反转。

    NEIGHBOR CONTEXT PROCESSING IN BLOCK PROCESSING PIPELINES
    153.
    发明申请
    NEIGHBOR CONTEXT PROCESSING IN BLOCK PROCESSING PIPELINES 有权
    在块加工管道中的邻域上下文处理

    公开(公告)号:US20150084969A1

    公开(公告)日:2015-03-26

    申请号:US14037316

    申请日:2013-09-25

    Applicant: Apple Inc.

    CPC classification number: G06T1/20 G06T1/60 H04N19/423 H04N19/436 H04N19/61

    Abstract: A block processing pipeline in which blocks are input to and processed according to row groups so that adjacent blocks on a row are not concurrently at adjacent stages of the pipeline. A stage of the pipeline may process a current block according to neighbor pixels from one or more neighbor blocks. Since adjacent blocks are not concurrently at adjacent stages, the left neighbor of the current block is at least two stages downstream from the stage. Thus, processed pixels from the left neighbor can be passed back to the stage for use in processing the current block without the need to wait for the left neighbor to complete processing at a next stage of the pipeline. In addition, the neighbor blocks may include blocks from the row above the current block. Information from these neighbor blocks may be passed to the stage from an upstream stage of the pipeline.

    Abstract translation: 块处理流水线,其中块被输入并根据行组进行处理,使得一行上的相邻块不是在管道的相邻阶段同时进行。 流水线的一个阶段可以根据一个或多个相邻块的相邻像素处理当前块。 由于相邻块不是在相邻阶段同时进行,所以当前块的左邻近位于级的下游至少两级。 因此,来自左邻居的经处理的像素可被传回到用于处理当前块的阶段,而不需要等待左邻居在流水线的下一阶段完成处理。 此外,相邻块可以包括来自当前块上方的行的块。 来自这些相邻块的信息可以从流水线的上游级传递到级。

    FLASH SYNCHRONIZATION USING IMAGE SENSOR INTERFACE TIMING SIGNAL
    154.
    发明申请
    FLASH SYNCHRONIZATION USING IMAGE SENSOR INTERFACE TIMING SIGNAL 审中-公开
    使用图像传感器接口时序信号进行快闪同步

    公开(公告)号:US20140240587A1

    公开(公告)日:2014-08-28

    申请号:US14171377

    申请日:2014-02-03

    Applicant: Apple Inc.

    CPC classification number: H04N5/2256 H04N5/225 H04N5/228 H04N5/2354

    Abstract: Certain aspects of this disclosure relate to an image signal processing system that includes a flash controller that is configured to activate a flash device prior to the start of a target image frame by using a sensor timing signal. In one embodiment, the flash controller receives a delayed sensor timing signal and determines a flash activation start time by using the delayed sensor timing signal to identify a time corresponding to the end of the previous frame, increasing that time by a vertical blanking time, and then subtracting a first offset to compensate for delay between the sensor timing signal and the delayed sensor timing signal. Then, the flash controller subtracts a second offset to determine the flash activation time, thus ensuring that the flash is activated prior to receiving the first pixel of the target frame.

    Abstract translation: 本公开的某些方面涉及一种图像信号处理系统,其包括闪存控制器,其被配置为通过使用传感器定时信号来在目标图像帧开始之前激活闪存设备。 在一个实施例中,闪光灯控制器接收延迟的传感器定时信号,并通过使用延迟的传感器定时信号来确定闪光激活开始时间,以识别对应于先前帧的结束的时间,通过垂直消隐时间增加该时间,以及 然后减去第一偏移量来补偿传感器定时信号和延迟的传感器定时信号之间的延迟。 然后,闪存控制器减去第二偏移量以确定闪光激活时间,从而确保在接收到目标帧的第一像素之前闪光被激活。

    Flash synchronization using image sensor interface timing signal
    155.
    发明授权
    Flash synchronization using image sensor interface timing signal 有权
    闪光同步使用图像传感器接口定时信号

    公开(公告)号:US08643770B2

    公开(公告)日:2014-02-04

    申请号:US13923175

    申请日:2013-06-20

    Applicant: Apple Inc.

    CPC classification number: H04N5/2256 H04N5/225 H04N5/228 H04N5/2354

    Abstract: Certain aspects of this disclosure relate to an image signal processing system that includes a flash controller that is configured to activate a flash device prior to the start of a target image frame by using a sensor timing signal. In one embodiment, the flash controller receives a delayed sensor timing signal and determines a flash activation start time by using the delayed sensor timing signal to identify a time corresponding to the end of the previous frame, increasing that time by a vertical blanking time, and then subtracting a first offset to compensate for delay between the sensor timing signal and the delayed sensor timing signal. Then, the flash controller subtracts a second offset to determine the flash activation time, thus ensuring that the flash is activated prior to receiving the first pixel of the target frame.

    Abstract translation: 本公开的某些方面涉及一种图像信号处理系统,其包括闪存控制器,其被配置为通过使用传感器定时信号来在目标图像帧开始之前激活闪存设备。 在一个实施例中,闪光灯控制器接收延迟的传感器定时信号,并通过使用延迟的传感器定时信号来确定闪光激活开始时间,以识别对应于先前帧的结束的时间,通过垂直消隐时间增加该时间,以及 然后减去第一偏移量来补偿传感器定时信号和延迟的传感器定时信号之间的延迟。 然后,闪存控制器减去第二偏移量以确定闪光激活时间,从而确保在接收到目标帧的第一像素之前闪光被激活。

    FLASH SYNCHRONIZATION USING IMAGE SENSOR INTERFACE TIMING SIGNAL
    156.
    发明申请
    FLASH SYNCHRONIZATION USING IMAGE SENSOR INTERFACE TIMING SIGNAL 有权
    使用图像传感器接口时序信号进行快闪同步

    公开(公告)号:US20130286242A1

    公开(公告)日:2013-10-31

    申请号:US13923175

    申请日:2013-06-20

    Applicant: APPLE INC.

    CPC classification number: H04N5/2256 H04N5/225 H04N5/228 H04N5/2354

    Abstract: Certain aspects of this disclosure relate to an image signal processing system that includes a flash controller that is configured to activate a flash device prior to the start of a target image frame by using a sensor timing signal. In one embodiment, the flash controller receives a delayed sensor timing signal and determines a flash activation start time by using the delayed sensor timing signal to identify a time corresponding to the end of the previous frame, increasing that time by a vertical blanking time, and then subtracting a first offset to compensate for delay between the sensor timing signal and the delayed sensor timing signal. Then, the flash controller subtracts a second offset to determine the flash activation time, thus ensuring that the flash is activated prior to receiving the first pixel of the target frame.

    Abstract translation: 本公开的某些方面涉及一种图像信号处理系统,其包括闪存控制器,其被配置为通过使用传感器定时信号来在目标图像帧开始之前激活闪存设备。 在一个实施例中,闪光灯控制器接收延迟的传感器定时信号,并通过使用延迟的传感器定时信号来确定闪光激活开始时间,以识别对应于先前帧的结束的时间,通过垂直消隐时间增加该时间,以及 然后减去第一偏移量来补偿传感器定时信号和延迟的传感器定时信号之间的延迟。 然后,闪存控制器减去第二偏移量以确定闪光激活时间,从而确保在接收到目标帧的第一像素之前闪光被激活。

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