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公开(公告)号:US11616956B2
公开(公告)日:2023-03-28
申请号:US17308397
申请日:2021-05-05
Inventor: Chong Soon Lim , Hai Wei Sun , Jing Ya Li , Han Boon Teo , Ru Ling Liao , Che Wei Kuo , Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe
IPC: H04N19/13 , H04N19/176
Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, determines whether a first block is available and whether a second block is available, the first block and the second block being defined relative to a current block to be processed; selects a context model based on whether the first block is available, whether the second block is available, which of inter prediction and intra prediction is to be applied to the first block, and which of inter prediction and intra prediction is to be applied to the second block; and encodes, using the context model selected, a parameter indicating which of intra prediction and inter prediction is to be applied to the current block.
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公开(公告)号:US11611758B2
公开(公告)日:2023-03-21
申请号:US16795408
申请日:2020-02-19
Inventor: Jing Ya Li , Chong Soon Lim , Han Boon Teo , Hai Wei Sun , Che Wei Kuo , Kiyofumi Abe , Takahiro NIshi , Tadamasa Toma , Yusuke Kato
IPC: G06V30/00 , H04N19/159 , H04N19/126 , H04N19/156 , H04N19/18 , H04N19/52 , H04N19/61
Abstract: An image encoder is provided including circuitry and a memory coupled to the circuitry. The circuitry, in operation, responds to a size of a block satisfying a size condition by generating a prediction image using a prediction mode selected from a plurality of prediction modes. The plurality of prediction modes include a first prediction mode in which a prediction process uses a motion vector and a reference block in a same picture as the block. The circuitry encodes the block using the prediction image.
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公开(公告)号:US11601669B2
公开(公告)日:2023-03-07
申请号:US17534898
申请日:2021-11-24
Inventor: Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/513 , H04N19/132 , H04N19/176 , H04N19/563
Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.
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公开(公告)号:US11575892B2
公开(公告)日:2023-02-07
申请号:US17532766
申请日:2021-11-22
Inventor: Sughosh Pavan Shashidhar , Hai Wei Sun , Chong Soon Lim , Ru Ling Liao , Han Boon Teo , Jing Ya Li , Takahiro Nishi , Kiyofumi Abe , Ryuichi Kanoh , Tadamasa Toma
IPC: H04N11/02 , H04N19/119 , H04N19/176 , H04N19/184 , H04N19/60
Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks.
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公开(公告)号:US11546591B2
公开(公告)日:2023-01-03
申请号:US17667871
申请日:2022-02-09
Inventor: Jing Ya Li , Chong Soon Lim , Hai Wei Sun , Han Boon Teo , Che Wei Kuo , Chu Tong Wang , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/82 , H04N19/117 , H04N19/105 , H04N19/119 , H04N19/124 , H04N19/13 , H04N19/18 , H04N19/186
Abstract: An encoder includes circuitry and memory. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component. The circuitry generates a third coefficient value by adding the first coefficient value to the second coefficient value, and encodes a third reconstructed image sample of the chroma component using the third coefficient value. In the CCALF process, in response to a coordinate of the second reconstructed image sample being (x, y), coordinates of the first reconstructed image samples are (2x, 2y−1), (2x−1, 2y), (2x, 2y), (2x+1, 2y), (2x−1, 2y+1), (2x, 2y+1), (2x+1, 2y+1), and (2x, 2y+2).
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公开(公告)号:US11503330B2
公开(公告)日:2022-11-15
申请号:US17319997
申请日:2021-05-13
Inventor: Jing Ya Li , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Han Boon Teo , Kiyofumi Abe , Tadamasa Toma , Takahiro Nishi
IPC: H04N19/00 , H04N19/52 , H04N19/12 , H04N19/174 , H04N19/182
Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.
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公开(公告)号:US11490076B2
公开(公告)日:2022-11-01
申请号:US17137061
申请日:2020-12-29
Inventor: Ru Ling Liao , Chong Soon Lim , Hai Wei Sun , Han Boon Teo , Jing Ya Li , Sughosh Pavan Shashidhar , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/105 , H04N19/159 , H04N19/176
Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
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公开(公告)号:US11463725B2
公开(公告)日:2022-10-04
申请号:US17230725
申请日:2021-04-14
Inventor: Jing Ya Li , Chong Soon Lim , Sughosh Pavan Shashidhar , Ru Ling Liao , Hai Wei Sun , Han Boon Teo , Kiyofumi Abe , Tadamasa Toma , Takahiro Nishi
IPC: H04N19/00 , H04N19/513 , H04N19/119 , H04N19/176 , H04N19/96
Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry corrects a base motion vector using a correction value in a fixed direction; and encodes a current partition by using the corrected base motion vector corrected. The correction value is specified by an index indicating one of correction values included in a table. The table is selected from among a plurality of tables, wherein the correction values in one of the plurality of tables have different increments from the correction values in another one of the plurality of tables.
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公开(公告)号:US11438580B2
公开(公告)日:2022-09-06
申请号:US17307336
申请日:2021-05-04
Inventor: Jing Ya Li , Ru Ling Liao , Chong Soon Lim , Han Boon Teo , Hai Wei Sun , Che Wei Kuo , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/105 , H04N19/136 , H04N19/159 , H04N19/176 , H04N19/52 , H04N19/80
Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of horizontal gradient values; derives, as a first parameter, the total sum of the absolute values of horizontal gradient values; derives, as a second parameter, the total sum of the absolute values of vertical gradient values; derives a horizontal-related pixel difference value; derives, as a third parameter, the total sum of the absolute values of horizontal-related pixel difference values; derives a vertical-related pixel difference value; derives, as a fourth parameter, the total sum of the absolute values of vertical-related pixel difference values; and generates a prediction image using the first to fourth parameters.
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公开(公告)号:US11303895B2
公开(公告)日:2022-04-12
申请号:US17007416
申请日:2020-08-31
Inventor: Sughosh Pavan Shashidhar , Hai Wei Sun , Chong Soon Lim , Ru Ling Liao , Han Boon Teo , Jing Ya Li , Takahiro Nishi , Kiyofumi Abe , Ryuichi Kanoh , Tadamasa Toma
IPC: H04N19/119 , H04N19/176 , H04N19/423 , H04N19/63
Abstract: An encoder that encodes a current block in a picture includes circuitry and memory. Using the memory, the circuitry: splits the current block into a first sub block, a second sub block, and a third sub block in a first direction, the second sub block being located between the first sub block and the third sub block; prohibits splitting the second sub block into two partitions in the first direction; and encodes the first sub block, the second sub block, and the third sub block.
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