公开(公告)号：US20200293143A1

公开(公告)日：2020-09-17

申请号：US16352844

申请日：2019-03-14

Applicant: Novatek Microelectronics Corp.

Inventor： Huan-Teng Cheng ,  Huang-Chin Tang

IPC: G06F3/041 ,  G09G3/20

Abstract: A timing control circuit and an operation method thereof are provided. The timing control circuit includes a receiving circuit, a line memory, and a timing generating circuit. The receiving circuit receives a video packet stream from the outside and provides an external horizontal sync signal and a first data signal. The line memory temporarily stores the first data signal, and outputs a second data signal to a source driver according to an internal horizontal sync signal generated by the timing generating circuit. A video frame period of the second data signal includes a video display operation period and a touch detection period. A video display operation period is divided into a plurality of sub-periods. The timing generating circuit performs a synchronization operation in each of the sub-periods, so as to synchronize the timing of the internal horizontal sync signal with the timing of the external horizontal sync signal.

公开(公告)号：US10770368B2

公开(公告)日：2020-09-08

申请号：US16055183

申请日：2018-08-06

Applicant: Novatek Microelectronics Corp.

Inventor： Wen-Ching Huang ,  Tai-Hung Lin

IPC: H01L23/29 ,  H01L23/367 ,  H01L23/373 ,  H01L23/00 ,  H01L23/495 ,  H01L21/48

Abstract: A chip on film package includes a base film, a chip and a heat-dissipation structure. The base film includes a first surface and a second surface opposite to the first surface. The chip is disposed on the first surface and has a chip length along a first axis of the chip and a chip width along a second axis of the chip perpendicular to the first axis. The heat-dissipation structure includes a covering portion. The covering portion at least partially covers the chip, exposes a side surface of the chip, and has a first length along the first axis and a second length along the second axis being longer than the chip width of the chip. The side surface connects a top surface and a bottom surface of the chip. A heat-dissipation structure is also provided.

公开(公告)号：US10770011B2

公开(公告)日：2020-09-08

申请号：US15969763

申请日：2018-05-02

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Chieh-An Lin ,  Chun-Yung Cho ,  Jhih-Siou Cheng

IPC: G09G3/36

Abstract: A buffer circuit, a display module, and a display driving method are disclosed. The buffer circuit comprises a first polarity buffer, a negative polarity buffer. The first polarity buffer receives a first supply voltage and a second supply voltage to output a first reference voltage to a first resistance string. The second supply voltage is less than the first supply voltage. The negative polarity buffer receives the second supply voltage and a third supply voltage to output a negative reference voltage to a negative resistance string. The third supply voltage is less than the second supply voltage.

公开(公告)号：US20200275149A1

公开(公告)日：2020-08-27

申请号：US16286630

申请日：2019-02-27

Applicant: Novatek Microelectronics Corp.

Inventor： Yung-Chih Su ,  Hong-Ruei Jhang

IPC: H04N21/43 ,  H04N21/643 ,  H04N21/61

Abstract: A multi-screen synchronized playback system including a group, a network time protocol (NTP) server is provided. The group includes a plurality of playback devices connected to a local area network (LAN). One of the playback devices is designated as a master playback device, the remaining playback devices of the playback devices are designated as slave playback devices. The NTP server is connected to the LAN and provides a standard time information for each of the playback devices. In preparing state, the master playback device sends a first type packet to each of the slave playback devices through the local area network, and the first type packet includes a starting playback time information according to the standard time information provided by the NTP server. A multi-screen synchronized playback method is also provided.

公开(公告)号：US10755655B2

公开(公告)日：2020-08-25

申请号：US16247595

申请日：2019-01-15

Applicant: Novatek Microelectronics Corp.

Inventor： Jen-Wei Li ,  Jen-Hao Liao

IPC: G09G3/36 ,  G09G3/3275 ,  G09G3/3258

Abstract: A source driver and an operation method thereof are provided. The source driver includes a chopper circuit and a source driver circuit. A first sub-pixel and a second sub-pixel are temporally or spatially adjacent to each other. The chopper circuit adds original gray-scale data of the first sub-pixel with a first value to serve as new gray-scale data of the first sub-pixel and deducts original gray-scale data of the second sub-pixel by a second value to serve as new gray-scale data of the second sub-pixel. The source driver circuit generates a first driving voltage for the first sub-pixel according to the new gray-scale data of the first sub-pixel and generates a second driving voltage for the second sub-pixel according to the new gray-scale data of the second sub-pixel.

公开(公告)号：US10755065B2

公开(公告)日：2020-08-25

申请号：US16208472

申请日：2018-12-03

Applicant: NOVATEK Microelectronics Corp.

Inventor： Yu-Tsung Wu ,  Chi-Ting Chen ,  Chih-Lun Cheng

IPC: G06K9/00 ,  H04N5/367 ,  G06K9/40

Abstract: A sensor device includes a fingerprint sensing module, configured to sense a first raw image using a first exposure time; and an exposure time adjusting module. The exposure time adjusting module is configured to obtain a first image according to the first raw image; determine whether the first image comprises a flicker noise; and adjust the first exposure time when the first image comprises the flicker noise, so as to mitigate the flicker noise.

公开(公告)号：US20200251072A1

公开(公告)日：2020-08-06

申请号：US16748832

申请日：2020-01-22

Applicant: Novatek Microelectronics Corp.

Inventor： Hung-Hsiang Chen ,  Tso-Hua Chien ,  Huang-Chin Tang

IPC: G09G5/18 ,  G09G3/36

Abstract: This disclosure relates to techniques for a driving apparatus including a reordering circuit and a source driving circuit. The reordering circuit can be configured to reorder a plurality of sub-pixel data of an input data string to generate a reordered data string so as to reduce a color switching number associated with a target data line. The source driving circuit can be coupled to the reordering circuit to receive the reordered data string. The source driving circuit can be configured to drive the target data line of a display panel according to the reordered data string.

公开(公告)号：US20200251058A1

公开(公告)日：2020-08-06

申请号：US16854920

申请日：2020-04-22

Applicant: Novatek Microelectronics Corp.

Inventor： Chung-Wen Wu ,  Wen-Chi Lin ,  Jiun-Yi Lin

IPC: G09G3/34

Abstract: A circuit arrangement for controlling a backlight source and an operation method are provided. The circuit arrangement includes a generator. The generator receives a sync signal and generates a pulse width modulation signal synchronous with the sync signal to control the backlight source. The sync signal indicates a frequency of a video including a series of image frames. The sync signal includes a sync period corresponding to a frame of the video. The pulse width modulation signal includes a first waveform pattern in a first sub-period of the sync period and a second waveform pattern in a second sub-period of the sync period. Each of the first waveform pattern and the second waveform pattern includes at least one active pulse. The first waveform pattern is substantially identical to the second waveform pattern.

公开(公告)号：US20200251033A1

公开(公告)日：2020-08-06

申请号：US16262934

申请日：2019-01-31

Applicant: Novatek Microelectronics Corp.

Inventor： Wei-Jhe Ma ,  Yung-Cheng Tsai ,  Feng-Ting Pai

IPC: G09G3/20

Abstract: A display apparatus and a brightness uniformity compensation method are introduced. The display apparatus includes a display panel, a content analysis circuit, a compensation table generator and a pixel compensation circuit. The content analysis circuit receives display data for a pixel of the display panel and analyzes a display load of the display data to generate a data compensation value. The compensation table generator generates a compensation table that includes the data compensation value corresponding to the display data of each pixel of the display panel. The pixel compensation circuit compensates the display data with the corresponding data compensation value included in the compensation table to generate compensated display data, wherein the compensated display data are displayed on the display panel of the display apparatus.

公开(公告)号：US20200243041A1

公开(公告)日：2020-07-30

申请号：US16845068

申请日：2020-04-10

Applicant: Novatek Microelectronics Corp.

Inventor： Syang-Yun Tzeng ,  Cheng-Kai Kuei ,  Chin-Hung Hsu

IPC: G09G5/00

Abstract: A timing controller and an operation method thereof are provided. The timing controller includes a transmitter circuit and a control circuit. The control circuit ends a normal mode and enter a swing boost mode when quality of data signal is detected to be deteriorated in the normal mode. In the swing boost mode, the control circuit boosts the swing of the data signal to be higher than a normal level of the data signal in the normal mode.