公开(公告)号：US07589556B1

公开(公告)日：2009-09-15

申请号：US11925717

申请日：2007-10-26

申请人： Johnson Tan ,  Andrew Bellis ,  Philip Clarke ,  Yan Chong ,  Joseph Huang ,  Michael H. M. Chu ,  Chiakang Sung

发明人： Johnson Tan ,  Andrew Bellis ,  Philip Clarke ,  Yan Chong ,  Joseph Huang ,  Michael H. M. Chu ,  Chiakang Sung

IPC分类号： G06F7/38

CPC分类号： H03M9/00 ,  H03K5/131 ,  H03K5/133 ,  H03K5/135 ,  H03K2005/00058

摘要： Circuits, methods, and apparatus for the dynamic control of calibration data that adjusts the timing of input and output signals on an integrated circuit. This dynamic control allows input and output circuits to self-calibrate by compensating for temperature and voltage changes in an efficient manner, without the need for device reconfiguration. Calibration settings can be maintained while new calibration settings are loaded. Skew between clock and data signals, as well as among multiple data signals, can be reduced. Dynamic control is achieved while consuming only a minimal resources including route paths.

摘要翻译： 用于动态控制校准数据的电路，方法和装置，用于调整集成电路上的输入和输出信号的时序。 该动态控制允许输入和输出电路通过以有效的方式补偿温度和电压变化而进行自校准，而不需要对器件重新配置。 加载新的校准设置时，可以保持校准设置。 可以减少时钟和数据信号之间以及多个数据信号之间的偏移。 实现动态控制，同时仅消耗包括路由路径在内的最小资源。

公开(公告)号：US07249222B1

公开(公告)日：2007-07-24

申请号：US10840183

申请日：2004-05-05

申请人： Andrew Bellis ,  Andrew Draper

发明人： Andrew Bellis ,  Andrew Draper

IPC分类号： G06F12/00

CPC分类号： G06F12/0215

摘要： A memory controller can perform prefetching, in a way which increases the efficiency with which data can be read from an external memory. More specifically, the memory controller operates such that it performs prefetching only under certain conditions, which are chosen such that there is a high probability that the data requested in the prefetching operation will be the data which is next required. The memory controller may be implemented in a programmable logic device (PLD), and be optimized for retrieving data from an external flash or SRAM memory device, which is used for storing configuration data for the PLD. By examining a read request, it is possible to determine whether a prefetching operation can be performed, with a high probability that it will be the required data which is prefetched.

摘要翻译： 存储器控制器可以以提高从外部存储器读取数据的效率的方式执行预取。 更具体地，存储器控制器操作使得其仅在某些条件下执行预取，这些条件被选择为使得在预取操作中请求的数据将是下一个需要的数据的可能性很高。 存储器控制器可以在可编程逻辑器件（PLD）中实现，并且被优化用于从用于存储PLD的配置数据的外部闪存或SRAM存储器件中检索数据。 通过检查读取请求，可以确定是否可以执行预取操作，其可能性将高于预取的所需数据。