公开(公告)号：US20080205166A1

公开(公告)日：2008-08-28

申请号：US12116688

申请日：2008-05-07

申请人： Chia-Lun Hsu ,  Mu-Yi Liu

发明人： Chia-Lun Hsu ,  Mu-Yi Liu

IPC分类号： G11C16/06

CPC分类号： G11C16/0466

摘要： Methods of manufacturing a nitride trapping EEPROM flash memory are described where each memory cell uses Si-Fin to form a nitride trapping EEPROM flash cell in which the source region and drain region are undoped. Each adjacent poly-gate to a selected poly-gate in a row of nitride trapping memory cells is used to produce the inversion region that acts as a source region or a drain region for transferring of a required voltage, which conserves the density of a memory cell given that the source region and the drain region for each memory cell are not doped. The flash memory includes a plurality of polysilicon layers intersecting with a plurality of Si-Fin layers.

摘要翻译： 描述了制造氮化物捕获EEPROM闪速存储器的方法，其中每个存储器单元使用Si-Fin形成其中源极区和漏极区未被掺杂的氮化物俘获EEPROM闪存单元。 使用与氮化物俘获存储器单元的行中的所选多晶硅栅极的每个相邻多晶硅栅极，以产生用作传输所需电压的源极区域或漏极区域的反转区域，其保存存储器的密度 给定每个存储单元的源区和漏区未被掺杂。 闪存包括与多个Si-Fin层交叉的多个多晶硅层。