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公开(公告)号：US10256728B1
公开(公告)日：2019-04-09
申请号：US15850407
申请日：2017-12-21
Applicant: Apple Inc.
Inventor： Michael Couleur , Fabio Ongaro , Nikola Jovanovic , Frank Trautmann
Abstract: An apparatus includes a plurality of pulse control circuits and a control circuit. A given pulse control circuit of the plurality of pulse control circuits may source a current pulse to the output power signal based on a comparison of a particular feedback signal of a plurality of feedback signals and a target voltage signal. The control circuit may offset a voltage level of each feedback signal of a first subset of the plurality of feedback signals. The first subset may exclude a first feedback signal. In response to a determination that a period of time has ended, the control circuit may offset a voltage level of each feedback signal of a second subset of the plurality of feedback signals. The second subset may include the first feedback signal and exclude a second feedback signal.
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Patent Agency Ranking
公开(公告)号：US20240088787A1
公开(公告)日：2024-03-14
申请号：US17931088
申请日：2022-09-09
Applicant: Apple Inc.
Inventor： Michael Couleur , Nicola Rasera , Nikola Jovanovic
IPC: H02M3/158
CPC classification number: H02M3/158
Abstract: A multi-level power converter circuit for computer systems maintains phase alignment with other power converter circuits by employing low-gain phase-locked loop circuits. In order to account for different voltage levels on its terminal nodes, the power converter circuit may perform a comparison of the respective voltage levels of its terminal nodes. Using results of the comparison, the power converter circuit can select different regulation modes using different ones of the low-gain phase-locked loop circuits.
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公开(公告)号：US20240077932A1
公开(公告)日：2024-03-07
申请号：US18122410
申请日：2023-03-16
Applicant: Apple Inc.
Inventor： Talbott M. Houk , Wenxun Huang , Nikola Jovanovic , Floyd L. Dankert , Sanjay Pant , Alessandro Molari , Siarhei Meliukh , Nicola Florio , Ludmil N. Nikolov , Nathan F. Hanagami , Hartmut Sturm , Di Zhao , Chad L. Olson , John J. Sullivan , Seyedeh Maryam Mortazavi Zanjani , Tristan R. Hudson , Jay B. Fletcher , Jonathan A. Dutra
IPC: G06F1/3296 , G06F1/3212 , G06F1/3234
CPC classification number: G06F1/3296 , G06F1/3212 , G06F1/3278
Abstract: The present disclosure describes a system with a power management device, a wakeup circuit, a battery management device, and a connector. During a powered down mode of operation, the battery management device can provide, via the connector, a bias voltage to the wakeup circuit. In response to a wakeup switch being activated, the battery management device can provide a power supply (e.g., from a battery) to the power management device. Benefits of the wakeup circuit include (1) a reduction of battery consumption—and thus improving battery lifetime—when the electronic system is in a powered down mode of operation because the wakeup circuit has lower number of active components compared to other designs and (2) a non-complex wakeup circuit design because one or more existing connector interconnects between the power management device and the battery management device can be re-used during electronic system's powered down mode of operation.
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公开(公告)号：US11837955B2
公开(公告)日：2023-12-05
申请号：US17397781
申请日：2021-08-09
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur , Bhanupriya Suresh
CPC classification number: H02M3/158 , H02M1/0009
Abstract: A power converter circuit included in a computer system may employ a compensation loop to adjust the durations of active times during which the power converter circuit sources energy to a load circuit via an inductor. The compensation loop includes an error signal whose value is based on a difference in the output voltage of the power converter circuit from a desired voltage level. During output transients, the error signal is adjusted using an injection current that tracks current flowing through the inductor.
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公开(公告)号：US20230043741A1
公开(公告)日：2023-02-09
申请号：US17397781
申请日：2021-08-09
Applicant: Apple Inc.
Inventor： Nikola Jovanovic , Michael Couleur , Bhanupriya Suresh
Abstract: A power converter circuit included in a computer system may employ a compensation loop to adjust the durations of active times during which the power converter circuit sources energy to a load circuit via an inductor. The compensation loop includes an error signal whose value is based on a difference in the output voltage of the power converter circuit from a desired voltage level. During output transients, the error signal is adjusted using an injection current that tracks current flowing through the inductor.
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公开(公告)号：US20190229622A1
公开(公告)日：2019-07-25
申请号：US16373616
申请日：2019-04-02
Applicant: Apple Inc.
Inventor： Michael Couleur , Fabio Ongaro , Nikola Jovanovic , Frank Trautmann
Abstract: An apparatus includes a plurality of pulse control circuits and a control circuit. A given pulse control circuit of the plurality of pulse control circuits may source a current pulse to the output power signal based on a comparison of a particular feedback signal of a plurality of feedback signals and a target voltage signal. The control circuit may offset a voltage level of each feedback signal of a first subset of the plurality of feedback signals. The first subset may exclude a first feedback signal. In response to a determination that a period of time has ended, the control circuit may offset a voltage level of each feedback signal of a second subset of the plurality of feedback signals. The second subset may include the first feedback signal and exclude a second feedback signal.
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