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公开(公告)号:US20210312861A1
公开(公告)日:2021-10-07
申请号:US17265828
申请日:2020-05-14
Inventor: Zhichong WANG , Fuqiang LI , Jing FENG , Peng LIU , Xinglong LUAN , Gaoming SUN
IPC: G09G3/3233
Abstract: Disclosed are a pixel circuit and a driving method thereof, an array substrate and a display device. The pixel circuit includes: a driving circuit, including a control terminal, a first terminal and a second terminal, and configured to control a driving current flowing through the first terminal and the second terminal for driving a light-emitting element to emit light; an input circuit, configured to transmit a reset voltage and a data signal in response to a first scan signal; a reset circuit, configured to apply the reset voltage to the control terminal in response to a second scan signal; a compensation circuit, configured to store the data signal and to electrically connect the control terminal with the second terminal in response to a third scan signal; and a data writing circuit, configured to apply the data signal to the compensation circuit in response to the third scan signal.
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公开(公告)号:US20180234056A1
公开(公告)日:2018-08-16
申请号:US15572307
申请日:2017-04-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Gaoming SUN , Chulgyu JUNG , Shou LI
CPC classification number: H03F1/14 , H03F1/02 , H03F1/0205 , H03F1/26 , H03F3/3022 , H03F3/45192 , H03F3/45636 , H03F2203/45051 , H03F2203/45644
Abstract: A two-stage operational amplifier is provided to comprise a bias voltage generator, a first stage operational amplifier and a second stage operational amplifier, wherein the first stage operational amplifier comprises a folded cascode amplifier circuit and a cross coupling load, the cross coupling load is coupled to a load differential pair in the folded cascode amplifier circuit, the cross coupling load comprises two transistors, the two transistors in the cross coupling load and two transistors in the load differential pair constitute two current mirror structures, which are cross coupled. In the solution, the cross coupling load is added to the load differential pair in the folded cascode amplifier circuit, to increase gain of the two-stage operational amplifier by using positive feedback and negative conductance gain enhancement technology; while parameters of MOSFETs in the folded cascode amplifier circuit are properly set to reduce noise of the two-stage operational amplifier.
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