公开(公告)号：US20200013691A1

公开(公告)日：2020-01-09

申请号：US16502553

申请日：2019-07-03

Applicant: Butterfly Network, Inc.

Inventor： Jianwei Liu ,  Keith G. Fife

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/56 ,  H01L23/00 ,  A61B8/00

Abstract: Described herein are methods and apparatuses for packaging an ultrasound-on-a-chip. An ultrasound-on-a-chip may be coupled to a redistribution layer and to an interposer layer. Encapsulation may encapsulate the ultrasound-on-a-chip device and first metal pillars may extend through the encapsulation and electrically couple to the redistribution layer. Second metal pillars may extend through the interposer layer. The interposer layer may include aluminum nitride. The first metal pillars may be electrically coupled to the second metal pillars. A printed circuit board may be coupled to the interposer layer.

公开(公告)号：US20190336103A1

公开(公告)日：2019-11-07

申请号：US16401249

申请日：2019-05-02

Applicant: Butterfly Network, Inc.

Inventor： Keith G. Fife ,  Jianwei Liu

IPC: A61B8/00 ,  H01L41/113 ,  H01L41/293

Abstract: Vertical packaging configurations for ultrasound chips are described. Vertical packaging may involve use of integrated interconnects other than wires for wire bonding. Examples of such integrated interconnects include edge-contact vias, through silicon vias and conductive pillars. Edge-contact vias are vias defined in a trench formed in the ultrasound chip. Multiple vias may be provided for each trench, thus increasing the density of vias. Such vias enable electric access to the ultrasound transducers. Through silicon vias are formed through the silicon handle and provide access from the bottom surface of the ultrasound chip. Conductive pillars, including copper pillars, are disposed around the perimeter of an ultrasound chip and provide access to the ultrasound transducers from the top surface of the chip. Use of these types of packaging techniques can enable a substantial reduction in the dimensions of an ultrasound device.

公开(公告)号：US20190275561A1

公开(公告)日：2019-09-12

申请号：US16296476

申请日：2019-03-08

Applicant: Butterfly Network, Inc.

Inventor： Keith G. Fife ,  Jianwei Liu

IPC: B06B1/02

Abstract: Aspects of the technology described herein relate to ultrasound transducer devices including capacitive micromachined ultrasonic transducers (CMUTs) and methods for forming CMUTs in ultrasound transducer devices. Some embodiments include forming a cavity of a CMUT by forming a first layer of insulating material on a first substrate, forming a second layer of insulating material on the first layer of insulating material, and then etching a cavity in the second insulating material. A second substrate may be bonded to the first substrate to seal the cavity. The first layer of insulating material may include, for example, aluminum oxide. The first substrate may include integrated circuitry. Some embodiments include forming through-silicon vias (TSVs) in the first substrate prior to forming the first and second insulating layers (TSV-Middle process) or subsequent to bonding the first and second substrates (TSV-Last process).