LAYOUT AND STRUCTURE OF MEMORY
    11.
    发明申请
    LAYOUT AND STRUCTURE OF MEMORY 有权
    存储器的布局和结构

    公开(公告)号:US20090032858A1

    公开(公告)日:2009-02-05

    申请号:US11927616

    申请日:2007-10-29

    CPC classification number: H01L27/115 H01L27/11521 H01L27/11524

    Abstract: A flash memory is provided. The flash memory features of having the select gate transistors to include two different channel structures, which are a recessed channel structure and a horizontal channel. Because of the design of the recessed channel structure, the space between the gate conductor lines, which are for interconnecting the select gates of the select gate transistors arranged on the same column, can be shortened. Therefore, the integration of the flash memory can be increased; and the process window of the STI process can be increased as well. In addition, at least one depletion-mode select gate transistor is at one side of the memory cell string. The select gate transistor of the depletion-mode is always turned on.

    Abstract translation: 提供闪存。 具有选择栅极晶体管的闪存特征包括两个不同的沟道结构,它们是凹陷沟道结构和水平沟道。 由于凹陷沟道结构的设计,可以缩短用于互连布置在同一列上的选择栅极晶体管的选择栅极的栅极导体线之间的空间。 因此,可以增加闪存的集成; 并且可以增加STI过程的处理窗口。 此外,至少一个耗尽型选择栅极晶体管位于存储单元串的一侧。 耗尽模式的选择栅晶体管总是导通。

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