DIGITAL CIRCUIT ARRANGEMENTS FOR AMBIENT NOISE-REDUCTION

    公开(公告)号:US20190251947A1

    公开(公告)日:2019-08-15

    申请号:US16394488

    申请日:2019-04-25

    Inventor: Richard Clemow

    Abstract: A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.

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