Error checking and correcting for content addressable memories (CAMs)
    11.
    发明授权
    Error checking and correcting for content addressable memories (CAMs) 有权
    错误检查和纠正内容可寻址存储器(CAM)

    公开(公告)号:US07200793B1

    公开(公告)日:2007-04-03

    申请号:US10106305

    申请日:2002-03-22

    CPC classification number: G06F11/1064 G11C2029/0411

    Abstract: Error checking and correcting (ECC) is performed on data held in a content addressable memory. An error check circuit receives words from a memory circuit or circuits, generates an error status and generates a corrected value when appropriate. A control circuit sequences through each of the words of the memory circuit(s), periodically reads from the memory circuit the next word in the sequence and provides the next word to the error check circuit. The bandwidth consumed by the periodic error check phase can be controlled by adjusting the interval between reads.

    Abstract translation: 对内容可寻址存储器中保存的数据执行错误检查和校正(ECC)。 错误检查电路从存储器电路或电路接收字,产生错误状态并在适当时产生校正值。 控制电路通过存储器电路的每一个字序列,周期性地从存储器电路读取序列中的下一个字,并将下一个字提供给错误校验电路。 可以通过调整读取间隔来控制周期性错误检查阶段消耗的带宽。

    Virtual connection shaping with hierarchial arbitration
    12.
    发明授权
    Virtual connection shaping with hierarchial arbitration 有权
    虚拟连接塑造与分级仲裁

    公开(公告)号:US06643293B1

    公开(公告)日:2003-11-04

    申请号:US09200444

    申请日:1998-11-27

    Abstract: Apparatus and method for shaping ATM cell traffic emitted onto a virtual path connection in an ATM network are described. Component virtual channel connections are arbitrated at an aggregation point utilizing an arbitration technique. The technique provides both virtual path shaping and controllability of underlying virtual channel connections with an improved fairness performance amongst all the aggregating virtual channel connections.

    Abstract translation: 描述了发送到ATM网络中的虚拟路径连接上的ATM信元业务的整形装置和方法。 使用仲裁技术在聚合点对组件虚拟通道连接进行仲裁。 该技术提供了虚拟通道整形和底层虚拟通道连接的可控性,并提高了所有聚合虚拟通道连接之间的公平性。

Patent Agency Ranking