Abstract:
Error checking and correcting (ECC) is performed on data held in a content addressable memory. An error check circuit receives words from a memory circuit or circuits, generates an error status and generates a corrected value when appropriate. A control circuit sequences through each of the words of the memory circuit(s), periodically reads from the memory circuit the next word in the sequence and provides the next word to the error check circuit. The bandwidth consumed by the periodic error check phase can be controlled by adjusting the interval between reads.
Abstract:
Apparatus and method for shaping ATM cell traffic emitted onto a virtual path connection in an ATM network are described. Component virtual channel connections are arbitrated at an aggregation point utilizing an arbitration technique. The technique provides both virtual path shaping and controllability of underlying virtual channel connections with an improved fairness performance amongst all the aggregating virtual channel connections.