公开(公告)号：US20140215424A1

公开(公告)日：2014-07-31

申请号：US13994882

申请日：2013-01-30

Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLC

Inventor： Kevin Fine ,  Ezekiel Kruglick

IPC: G06F17/50

CPC classification number: G06F17/5054

Abstract: Technologies related to dynamic reconfiguration of programmable hardware are generally described. In some examples, coprocessor regions in programmable hardware such as a Field Programmable Gate Array (FPGA) may be dynamically assigned to transition the FPGA from a starting arrangement of coprocessor regions to an efficient arrangement. A placement algorithm may be executed to determine the efficient arrangement, and a path finding algorithm may be executed to determine path finding operations leading from the starting arrangement to the efficient arrangement. The path finding operations may be performed to implement the transition.

Abstract translation: 通常描述与可编程硬件的动态重新配置相关的技术。 在一些示例中，诸如现场可编程门阵列（FPGA）的可编程硬件中的协处理器区域可以被动态分配以将FPGA从协处理器区域的启动布置转换到有效的布置。 可以执行放置算法以确定有效的布置，并且可以执行路径查找算法以确定从起始布置到有效布置的路径查找操作。 可以执行路径查找操作以实现转换。