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    Non-volatile memory device and method of manufacturing the same
    11.
    发明申请
    Non-volatile memory device and method of manufacturing the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US20080283902A1

    公开(公告)日：2008-11-20

    申请号：US12153071

    申请日：2008-05-13

    申请人： Suk-Kang Sung ,  Kyu-Charn Park ,  Choong-Ho Lee

    发明人： Suk-Kang Sung ,  Kyu-Charn Park ,  Choong-Ho Lee

    IPC分类号： H01L29/792 ,  H01L21/336

    CPC分类号： H01L21/743 ,  H01L21/28123 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

    摘要： A method of manufacturing a non-volatile memory device includes sequentially depositing a first insulation layer, a charge storage layer, and a second insulation layer on a substrate, forming a first opening through the resultant structure to expose the substrate, forming second and third openings through the second insulation layer to form a second insulation layer pattern, forming a conductive layer on the second insulation layer pattern, forming a photoresist pattern structure on the conductive layer, and forming simultaneously a common source line, at least one ground selection line, at least one string selection line, and a plurality of gate structures on the substrate by etching through the photoresist pattern structure, wherein the common source line and the gate structures are formed simultaneously on a substantially same level and of substantially same components.

    摘要翻译： 一种制造非易失性存储器件的方法包括在衬底上依次沉积第一绝缘层，电荷存储层和第二绝缘层，形成通过所得结构的第一开口以露出衬底，形成第二和第三开口 通过第二绝缘层形成第二绝缘层图案，在第二绝缘层图案上形成导电层，在导电层上形成光致抗蚀剂图形结构，同时形成共同的源极线，至少一个接地选择线， 至少一个串选择线，以及通过蚀刻通过光致抗蚀剂图案结构在衬底上的多个栅极结构，其中公共源极线和栅极结构同时形成在基本相同的水平面上并且基本上相同的部件。

    Semiconductor memory device, method of fabricating the same, and devices employing the semiconductor memory device
    13.
    发明申请
    Semiconductor memory device, method of fabricating the same, and devices employing the semiconductor memory device 有权
    半导体存储器件及其制造方法以及采用半导体存储器件的器件

    公开(公告)号：US20080237685A1

    公开(公告)日：2008-10-02

    申请号：US11822548

    申请日：2007-07-06

    申请人： Byung-Kyu Cho ,  Se-Hoon Lee ,  Kyu-Charn Park ,  Choong-Ho Lee

    发明人： Byung-Kyu Cho ,  Se-Hoon Lee ,  Kyu-Charn Park ,  Choong-Ho Lee

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/66825

    摘要： In one embodiment, the semiconductor memory device includes a semiconductor substrate having projecting portions, a tunnel insulation layer formed over at least one of the projecting semiconductor substrate portions, and a floating gate structure disposed over the tunnel insulation layer. An upper portion of the floating gate structure is wider than a lower portion of the floating gate structure, and the lower portion of the floating gate structure has a width less than a width of the tunnel insulating layer. First insulation layer portions are formed in the semiconductor substrate and project from the semiconductor substrate such that the floating gate structure is disposed between the projecting first insulation layer portions. A dielectric layer is formed over the first insulation layer portions and the floating gate structure, and a control gate is formed over the dielectric layer.

    摘要翻译： 在一个实施例中，半导体存储器件包括具有突出部分的半导体衬底，在至少一个突出半导体衬底部分上形成的隧道绝缘层，以及设置在隧道绝缘层上的浮动栅极结构。 浮动栅极结构的上部比浮动栅极结构的下部宽，并且浮动栅极结构的下部具有小于隧道绝缘层的宽度的宽度。 第一绝缘层部分形成在半导体衬底中并从半导体衬底突出，使得浮栅结构设置在突出的第一绝缘层部分之间。 在第一绝缘层部分和浮动栅极结构之上形成电介质层，并且在电介质层上形成控制栅极。

    Method of fabricating cell of nonvolatile memory device with floating gate
    15.
    发明授权
    Method of fabricating cell of nonvolatile memory device with floating gate 有权
    具有浮动栅极的非易失性存储器件单元制造方法

    公开(公告)号：US07122426B2

    公开(公告)日：2006-10-17

    申请号：US10788002

    申请日：2004-02-25

    申请人： Chang-Hyun Lee ,  Kyu-Charn Park ,  Jeong-Hyuk Choi ,  Sung-Hoi Hur

    发明人： Chang-Hyun Lee ,  Kyu-Charn Park ,  Jeong-Hyuk Choi ,  Sung-Hoi Hur

    IPC分类号： H01L21/8247

    CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L27/11519 ,  Y10S257/905

    摘要： This disclosure provides cells of nonvolatile memory devices with floating gates and methods for fabricating the same. The cell of the nonvolatile memory device includes device isolation layers in parallel with each other on a predetermined region of a semiconductor substrate that define a plurality of active regions. Each device isolation layer has sidewalls that project over the semiconductor substrate. A plurality of word lines crosses over the device isolation layers. A tunnel oxide layer, a floating gate, a gate interlayer dielectric layer, and a control gate electrode are sequentially stacked between each active region and each word line. The floating gate and the control gate electrode have sidewalls that are self-aligned to the adjacent device isolation layers. The method for forming the self-aligned floating gate and the control gate electrode includes forming trenches in a semiconductor substrate to define a plurality of active regions and concurrently forming an oxide layer pattern, a floating gate pattern, a dielectric layer pattern and a control gate pattern that are sequentially stacked. A conductive layer is then formed on the device isolation layers and the control gate pattern. Thereafter, the conductive layer, the control gate pattern, the dielectric layer pattern, the floating gate pattern, and the oxide layer pattern are successively patterned.

    摘要翻译： 本公开提供具有浮动栅极的非易失性存储器件单元以及用于制造其的方法。 非易失性存储器件的单元包括在限定多个有源区域的半导体衬底的预定区域上彼此并联的器件隔离层。 每个器件隔离层具有突出在半导体衬底上的侧壁。 多个字线跨越器件隔离层。 隧道氧化物层，浮置栅极，栅极层间电介质层和控制栅极电极顺序堆叠在每个有源区域和每条字线之间。 浮栅和控制栅极具有与相邻器件隔离层自对准的侧壁。 形成自对准浮栅和控制栅极的方法包括在半导体衬底中形成沟槽以限定多个有源区并同时形成氧化物层图案，浮栅图案，电介质层图案和控制栅极 顺序堆叠的图案。 然后在器件隔离层和控制栅极图案上形成导电层。 此后，连续地形成导电层，控制栅极图案，电介质层图案，浮栅图案和氧化物层图案。

    Non-volatile memory devices including a floating gate and methods of manufacturing the same
    17.
    发明授权
    Non-volatile memory devices including a floating gate and methods of manufacturing the same 有权
    包括浮动栅极的非易失性存储器件及其制造方法

    公开(公告)号：US08120091B2

    公开(公告)日：2012-02-21

    申请号：US12128078

    申请日：2008-05-28

    申请人： Suk-Kang Sung ,  Choong-Ho Lee ,  Sang-wook Lim ,  Dong-Uk Choi ,  Hee-Soo Kang ,  Kyu-Charn Park

    发明人： Suk-Kang Sung ,  Choong-Ho Lee ,  Sang-wook Lim ,  Dong-Uk Choi ,  Hee-Soo Kang ,  Kyu-Charn Park

    IPC分类号： H01L29/788

    CPC分类号： H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324

    摘要： A non-volatile memory device includes a substrate and a tunnel insulation layer pattern, such that each portion of the tunnel insulation pattern extends along a first direction and adjacent portions of the tunnel insulation layer pattern may be separated in a second direction that is substantially perpendicular to the first direction. A non-volatile memory device may include a gate structure formed on the tunnel insulation layer pattern. The gate structure may include a floating gate formed on the tunnel insulation layer pattern along the second direction, a first conductive layer pattern formed on the floating gate in the second direction, a dielectric layer pattern formed on the first conductive layer pattern along the second direction, and a control gate formed on the dielectric layer pattern in the second direction.

    摘要翻译： 非易失性存储器件包括衬底和隧道绝缘层图案，使得隧道绝缘图案的每个部分沿着第一方向延伸，并且隧道绝缘层图案的相邻部分可以在基本垂直的第二方向上分离 到第一个方向。 非易失性存储器件可以包括形成在隧道绝缘层图案上的栅极结构。 栅极结构可以包括沿着第二方向形成在隧道绝缘层图案上的浮动栅极，在第二方向上形成在浮置栅极上的第一导电层图案，沿着第二方向形成在第一导电层图案上的电介质层图案 以及在第二方向上形成在电介质层图案上的控制栅极。

    Non-volatile memory device and method of manufacturing the same
    18.
    发明授权
    Non-volatile memory device and method of manufacturing the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US07615437B2

    公开(公告)日：2009-11-10

    申请号：US12153071

    申请日：2008-05-13

    申请人： Suk-Kang Sung ,  Kyu-Charn Park ,  Choong-Ho Lee

    发明人： Suk-Kang Sung ,  Kyu-Charn Park ,  Choong-Ho Lee

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/743 ,  H01L21/28123 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

    摘要： A method of manufacturing a non-volatile memory device includes sequentially depositing a first insulation layer, a charge storage layer, and a second insulation layer on a substrate, forming a first opening through the resultant structure to expose the substrate, forming second and third openings through the second insulation layer to form a second insulation layer pattern, forming a conductive layer on the second insulation layer pattern, forming a photoresist pattern structure on the conductive layer, and forming simultaneously a common source line, at least one ground selection line, at least one string selection line, and a plurality of gate structures on the substrate by etching through the photoresist pattern structure, wherein the common source line and the gate structures are formed simultaneously on a substantially same level and of substantially same components.

    摘要翻译： 一种制造非易失性存储器件的方法包括在衬底上依次沉积第一绝缘层，电荷存储层和第二绝缘层，形成通过所得结构的第一开口以露出衬底，形成第二和第三开口 通过第二绝缘层形成第二绝缘层图案，在第二绝缘层图案上形成导电层，在导电层上形成光致抗蚀剂图形结构，同时形成共同的源极线，至少一个接地选择线， 至少一个串选择线，以及通过蚀刻通过光致抗蚀剂图案结构在衬底上的多个栅极结构，其中公共源极线和栅极结构同时形成在基本相同的水平面上并且基本上相同的部件。

    Non-volatile memory device, method of manufacturing the same, and method of operating the same
    19.
    发明授权
    Non-volatile memory device, method of manufacturing the same, and method of operating the same 有权
    非易失性存储器件，其制造方法及其操作方法

    公开(公告)号：US07602633B2

    公开(公告)日：2009-10-13

    申请号：US11946737

    申请日：2007-11-28

    申请人： Byung-Yong Choi ,  Choong-Ho Lee ,  Kyu-Charn Park

    发明人： Byung-Yong Choi ,  Choong-Ho Lee ,  Kyu-Charn Park

    IPC分类号： G11C11/00

    CPC分类号： H01L29/685

    摘要： A non-volatile memory device includes a substrate, resistance patterns, a gate dielectric layer, a gate electrode pattern, a first impurity region and a second impurity region. The substrate has recesses. The recesses are filled with the resistance patterns. The resistance patterns include a material having a resistance that is variable in accordance with a voltage applied thereto. The gate dielectric layer is formed on the substrate. The gate electrode pattern is formed on the gate dielectric layer. The first and second impurity regions are formed in the substrate. The first impurity region and the second impurity region contact side surfaces of the resistance patterns. Further, the resistance patterns, the first impurity region and the second impurity region define a channel region. Thus, the non-volatile memory device may store data using a variable resistance of the resistance patterns so that the non-volatile memory device may have excellent operational characteristics.

    摘要翻译： 非易失性存储器件包括衬底，电阻图案，栅极介电层，栅极电极图案，第一杂质区域和第二杂质区域。 基板有凹槽。 凹槽中填充有电阻图案。 电阻图案包括具有根据施加到其上的电压而可变的电阻的材料。 栅极电介质层形成在基板上。 栅极电极图案形成在栅极介电层上。 在衬底中形成第一和第二杂质区。 电阻图案的第一杂质区和第二杂质区接触侧表面。 此外，电阻图案，第一杂质区域和第二杂质区域限定沟道区域。 因此，非易失性存储器件可以使用电阻图案的可变电阻来存储数据，使得非易失性存储器件可以具有优异的操作特性。