公开(公告)号：US07223707B1

公开(公告)日：2007-05-29

申请号：US11027480

申请日：2004-12-30

申请人： George D. Papasouliotis ,  Jeff Tobin ,  Ron Rulkens ,  Dennis M. Hausmann ,  Adrianne K. Tipton ,  Raihan M. Tarafdar ,  Bunsen Nie

发明人： George D. Papasouliotis ,  Jeff Tobin ,  Ron Rulkens ,  Dennis M. Hausmann ,  Adrianne K. Tipton ,  Raihan M. Tarafdar ,  Bunsen Nie

IPC分类号： H01L21/00

CPC分类号： C23C16/45534 ,  C23C16/402 ,  C23C16/45529 ,  H01L21/02145 ,  H01L21/02164 ,  H01L21/02214 ,  H01L21/0228 ,  H01L21/3142 ,  H01L21/31612 ,  H01L21/3162 ,  H01L21/76837

摘要： A method for using ALD and RVD techniques in semiconductor manufacturing to produce a smooth nanolaminate dielectric film, in particular for filling structures with doped or undoped silica glass, uses dynamic process conditions. A dynamic process using variable substrate (e.g., wafer) temperature, reactor pressure and/or reactant partial pressure, as opposed to static process conditions through various cycles, can be used to minimize film roughness and improve gap fill performance and film properties via the elimination or reduction of seam occurrence. Overall film roughness can be reduced by operating the initial growth cycle under conditions which optimize film smoothness, and then switching to conditions that will enhance conformality, gap fill and film properties for the subsequent process cycles. Film deposition characteristics can be changed by modulating one or more of a number of process parameters including wafer temperature, reactor pressure, reactant partial pressure and combinations of these.

摘要翻译： 在半导体制造中使用ALD和RVD技术来生产光滑的纳米层状电介质膜的方法，特别是用掺杂或未掺杂的石英玻璃填充结构的方法，使用动态工艺条件。 可以使用与通过各种循环的静态工艺条件相反的使用可变衬底（例如，晶片）温度，反应器压力和/或反应物分压的动态过程来最小化膜粗糙度，并通过消除来改善间隙填充性能和膜性质 或减少接缝发生。 通过在优化膜平滑性的条件下操作初始生长周期，然后转换到将增强后续工艺循环的共形性，间隙填充和膜性能的条件，可以降低总膜的粗糙度。 可以通过调制包括晶片温度，反应器压力，反应物分压以及它们的组合在内的多个工艺参数中的一个或多个来改变膜沉积特性。

公开(公告)号：US07135418B1

公开(公告)日：2006-11-14

申请号：US11077198

申请日：2005-03-09

申请人： George D. Papasouliotis

发明人： George D. Papasouliotis

IPC分类号： H01L21/31

CPC分类号： C23C16/4408 ,  C23C16/045 ,  C23C16/402 ,  C23C16/45523 ,  C23C16/45557 ,  H01L21/3142 ,  H01L21/31608 ,  H01L21/31616 ,  Y10S438/907 ,  Y10S438/909 ,  Y10S438/935

摘要： Methods of forming conformal films that reduce the amount of metal-containing precursor and/or silicon containing precursor materials required are described. The methods increase the amount of film grown following each dose of metal-containing and/or silicon-containing precursors. The methods may involve introducing multiple doses of the silicon-containing precursor for each dose of the metal-containing precursor and/or re-pressurizing the process chamber during exposure to a dose of the silicon-containing precursor. The methods of the present invention are particularly suitable for use in RVD processes.

摘要翻译： 描述了形成保护膜的方法，其减少了含金属的前体和/或含硅前体材料的量。 这些方法增加了每种剂量的含金属和/或含硅前体后生长的膜的量。 该方法可以包括在暴露于含硅前体的剂量期间为每个剂量的含金属的前体引入多个剂量的含硅前体和/或再加压处理室。 本发明的方法特别适用于RVD方法。

公开(公告)号：US08698106B2

公开(公告)日：2014-04-15

申请号：US12428527

申请日：2009-04-23

申请人： Helen Maynard ,  George D. Papasouliotis

发明人： Helen Maynard ,  George D. Papasouliotis

IPC分类号： G21K5/00

CPC分类号： G01B11/0683

摘要： A method and apparatus are described herein which allow the progression of delamination of a film to be monitored. An interferometer is used to detect the onset and progression of thin film delamination. By projecting one or more wavelengths at a surface, and measuring the reflectance of these projected wavelengths, it is possible to monitor the progression of the delamination process. Testing has shown that different stages of the delamination process produce different reflectance graphs. This information can be used to establish implantation parameters, or can be used as an in situ monitor. The same techniques can be used for other applications. For example, in certain implantation systems, such as PECVD, a film of material may developed on the walls of the chamber. The techniques described herein can be used to monitor this separation, and determine when preventative maintenance may be performed on the chamber.

摘要翻译： 本文描述了一种方法和装置，其允许待监测的膜的分层进展。 干涉仪用于检测薄膜分层的发生和进展。 通过在表面投射一个或多个波长并测量这些投影波长的反射率，可以监测分层过程的进展。 测试表明，分层过程的不同阶段产生不同的反射率图。 该信息可用于建立植入参数，或可用作原位监测。 相同的技术可以用于其他应用。 例如，在诸如PECVD的某些植入系统中，材料膜可以在室的壁上显影。 本文描述的技术可以用于监测该分离，并且确定何时可以在腔室上进行预防性维护。

公开(公告)号：US08592783B2

公开(公告)日：2013-11-26

申请号：US13245035

申请日：2011-09-26

申请人： Kamal Hadidi ,  George D. Papasouliotis ,  Craig R. Chaney

发明人： Kamal Hadidi ,  George D. Papasouliotis ,  Craig R. Chaney

IPC分类号： G21K5/00

CPC分类号： C23C14/564 ,  C23C16/4404 ,  H01J37/3171 ,  H01J37/32477 ,  H01J2237/0213 ,  H01J2237/08 ,  H01J2237/16

摘要： An improved plasma processing chamber is disclosed, wherein some or all of the components which are exposed to the plasma are made of, or coated with, titanium diborane. Titanium diborane has a hardness in excess of 9 mhos, making it less susceptible to sputtering. In addition, titanium diborane is resistant to fluoride and chlorine ions. Finally, titanium diborane is electrically conductive, and therefore the plasma remains more uniform over time, as charge does not build on the surfaces of the titanium diborane components. This results in improved workpiece processing, with less contaminants and greater uniformity. In other embodiments, titanium diborane may be used to line components within a beam line implanter.

摘要翻译： 公开了一种改进的等离子体处理室，其中暴露于等离子体的部分或全部组分由钛乙硼烷制成或涂覆。 钛乙硼烷的硬度超过9毫摩尔，使其不易溅射。 此外，乙硼烷钛耐氟化物和氯离子。 最后，乙硼烷钛是导电的，因此随着时间的推移，等离子体保持更均匀，因为电荷不会在钛二硼烷组分的表面上形成。 这导致改进的工件加工，更少的污染物和更大的均匀性。 在其它实施方案中，可以使用乙硼烷钛来在束线注入机内引导组分。

公开(公告)号：US20120263887A1

公开(公告)日：2012-10-18

申请号：US13085615

申请日：2011-04-13

申请人： George D. Papasouliotis ,  Ludovic Godet

发明人： George D. Papasouliotis ,  Ludovic Godet

IPC分类号： C23C16/50 ,  C23C16/52 ,  C23C16/46 ,  C23C16/02 ,  C23C16/44 ,  C23C16/458

CPC分类号： C23C16/45542 ,  C23C16/45551

摘要： An apparatus for depositing a coating may comprise a first processing chamber configured to deposit a first reactant as a reactant layer on a substrate during a first time period. A second processing chamber may be configured to direct ions incident on the substrate at a second time and configured to deposit a second reactant on the substrate during a second time period, wherein the second reactant is configured to react with the reactant layer.

摘要翻译： 用于沉积涂层的装置可以包括第一处理室，其被配置为在第一时间段期间将作为反应物层的第一反应物沉积在基板上。 第二处理室可以被配置为在第二时间引导入射在衬底上的离子，并且被配置为在第二时间段期间在衬底上沉积第二反应物，其中第二反应物构造成与反应物层反应。

公开(公告)号：US07737013B2

公开(公告)日：2010-06-15

申请号：US12255181

申请日：2008-10-21

申请人： Heyun Yin ,  George D. Papasouliotis ,  Vikram Singh

发明人： Heyun Yin ,  George D. Papasouliotis ,  Vikram Singh

IPC分类号： H01L21/00

CPC分类号： H01L21/76846 ,  H01L21/76849 ,  H01L21/76867

摘要： A first species and a second species are implanted into a conductor of a substrate, which may be copper. The first species and second species may be implanted sequentially or at least partly simultaneously. Diffusion of the first species within the conductor of the substrate is prevented by the presence of the second species. In one particular example, the first species is silicon and the second species is nitrogen, although other combinations are possible.

摘要翻译： 第一种和第二种被植入到可以是铜的衬底的导体中。 可以顺序地或至少部分地同时植入第一种和第二种。 通过第二种物质的存在来防止第一种在基底导体内的扩散。 在一个具体实例中，第一种是硅，第二种是氮，尽管其它组合是可能的。

公开(公告)号：US20090227096A1

公开(公告)日：2009-09-10

申请号：US12044619

申请日：2008-03-07

申请人： Ludovic Godet ,  George D. Papasouliotis

发明人： Ludovic Godet ,  George D. Papasouliotis

IPC分类号： H01L21/265

CPC分类号： H01L21/26506 ,  H01L21/26513 ,  H01L21/26566 ,  H01L21/2658

摘要： A method of forming a retrograde material profile in a substrate includes forming a surface peak profile on the substrate. Ions are then implanted into the substrate to form a retrograde profile from the surface peak profile, at least one of an ion implantation dose and an ion implantation energy of the implanted ions being chosen so that the retrograde profile has a peak concentration that is positioned at a desired distance from the surface of the substrate.

摘要翻译： 在衬底中形成逆行材料轮廓的方法包括在衬底上形成表面峰分布。 然后将离子注入到衬底中以从表面峰曲线形成逆行曲线，选择注入离子的离子注入剂量和离子注入能量中的至少一种，使得逆行曲线具有位于 距离衬底表面的期望距离。

公开(公告)号：US20090061605A1

公开(公告)日：2009-03-05

申请号：US12267193

申请日：2008-11-07

申请人： Ludovic GODET ,  George D. Papasouliotis ,  Ziwei Fang ,  Richard Appel ,  Vincent Deno ,  Vikram Singh ,  Harold M. Persing

发明人： Ludovic GODET ,  George D. Papasouliotis ,  Ziwei Fang ,  Richard Appel ,  Vincent Deno ,  Vikram Singh ,  Harold M. Persing

IPC分类号： H01L21/265

CPC分类号： H01J37/3171 ,  H01J37/32412 ,  H01J37/32935 ,  H01J2237/31705 ,  H01L21/2236

摘要： A method to provide a dopant profile adjustment solution in plasma doping systems for meeting both concentration and junction depth requirements. Bias ramping and bias ramp rate adjusting may be performed to achieve a desired dopant profile so that surface peak dopant profiles and retrograde dopant profiles are realized. The method may include an amorphization step in one embodiment.

摘要翻译： 在等离子体掺杂系统中提供掺杂剂分布调整溶液以满足浓度和结深度要求的方法。 可以执行偏置斜坡调整和偏置斜率调整以实现期望的掺杂剂分布，从而实现表面峰值掺杂剂分布和逆向掺杂剂分布。 该方法可以包括在一个实施方案中的非晶化步骤。

公开(公告)号：US07176039B1

公开(公告)日：2007-02-13

申请号：US10947424

申请日：2004-09-21

申请人： George D. Papasouliotis ,  Atiye Bayman

发明人： George D. Papasouliotis ,  Atiye Bayman

IPC分类号： H01L21/00

CPC分类号： H01L21/31612 ,  C23C16/045 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/76837 ,  H01L22/26

摘要： A method for process optimization to extend the utility of the HDP CVD gap fill technique modifies the characteristics of the HDP process (deposition and sputter components) in a dynamic mode in the course of filling a trench with dielectric material. As a result, the amount of dielectric deposited on the sidewall of the trench relative to that deposited at its bottom can be reduced and optimally minimized, thus improving the gap fill capability of the process. The dynamic modification of process characteristics provides enhanced process performance, since the optimization of these characteristics depends upon structure geometry, which is constantly changing during a gap fill operation. During the course of the gap fill operation, either at one or more discrete points or continuously, the evolution of the feature geometry is determined, either by direct measurement or in accordance with a growth model. The deposition process is modified to optimize the characteristics to the partially-filled feature geometry, and further filling the partially-filled feature using the modified deposition process is conducted. The process modification, including the geometry determination, and further filling with optimized process characteristics is optionally repeated until the gap is filled. In semiconductor manufacture, the invention relates to HDP CVD processes used to deposit IMD, ILD, or STI films for gap fill applications.

摘要翻译： 用于扩展HDP CVD间隙填充技术的用途的工艺优化方法在用电介质材料填充沟槽的过程中以动态模式改变HDP工艺（沉积和溅射部件）的特性。 结果，相对于沉积在其底部的沟槽的侧壁上沉积的电介质的量可以减少并最优化地最小化，从而提高了工艺的间隙填充能力。 过程特性的动态修改提供了增强的工艺性能，因为这些特性的优化取决于在间隙填充操作期间不断变化的结构几何形状。 在间隙填充操作过程中，无论是在一个或多个离散点还是连续地，通过直接测量或根据增长模型来确定特征几何的演变。 修改沉积过程以优化部分填充的特征几何形状的特征，并且使用改进的沉积工艺进一步填充部分填充的特征。 任选地重复包括几何确定和进一步填充优化的工艺特性的工艺改进，直到间隙被填充。 在半导体制造中，本发明涉及用于沉积用于间隙填充应用的IMD，ILD或STI膜的HDP CVD工艺。

公开(公告)号：US07148155B1

公开(公告)日：2006-12-12

申请号：US10975028

申请日：2004-10-26

申请人： Raihan M. Tarafdar ,  George D. Papasouliotis ,  Ron Rulkens ,  Dennis M. Hausmann ,  Jeff Tobin ,  Adrianne K. Tipton ,  Bunsen Nie

发明人： Raihan M. Tarafdar ,  George D. Papasouliotis ,  Ron Rulkens ,  Dennis M. Hausmann ,  Jeff Tobin ,  Adrianne K. Tipton ,  Bunsen Nie

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/31612 ,  H01L21/02164 ,  H01L21/0228 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/76224

摘要： A silicon dioxide-based dielectric layer is formed on a substrate surface by a sequential deposition/anneal technique. The deposited layer thickness is insufficient to prevent substantially complete penetration of annealing process agents into the layer and migration of water out of the layer. The dielectric layer is then annealed, ideally at a moderate temperature, to remove water and thereby fully densify the film. The deposition and anneal processes are then repeated until a desired dielectric film thickness is achieved.

摘要翻译： 通过顺序沉积/退火技术在基板表面上形成二氧化硅基介电层。 沉积层厚度不足以防止退火处理剂基本上完全渗透到层中并将水从层中迁移出来。 然后将电介质层退火，理想地在中等温度下去除水，从而使膜完全致密化。 然后重复沉积和退火处理，直到达到所需的电介质膜厚度。