Instructions processors, methods, and systems to process BLAKE secure hashing algorithm
    11.
    发明授权
    Instructions processors, methods, and systems to process BLAKE secure hashing algorithm 有权
    指令处理器,方法和系统来处理BLAKE安全散列算法

    公开(公告)号:US09100184B2

    公开(公告)日:2015-08-04

    申请号:US13976741

    申请日:2011-12-22

    摘要: A method of an aspect includes receiving an instruction indicating a first source having at least one set of four state matrix data elements, which represent a complete set of four inputs to a G function of a cryptographic hashing algorithm. The algorithm uses a sixteen data element state matrix, and alternates between updating data elements in columns and diagonals. The instruction also indicates a second source having data elements that represent message and constant data. In response to the instruction, a result is stored in a destination indicated by the instruction. The result includes updated state matrix data elements including at least one set of four updated state matrix data elements. Each of the four updated state matrix data elements represents a corresponding one of the four state matrix data elements of the first source, which has been updated by the G function.

    摘要翻译: 一种方面的方法包括:接收指示具有至少一组四个状态矩阵数据元素的第一源的指令,其表示对密码散列算法的G函数的四个输入的完整集合。 该算法使用十六个数据元素状态矩阵,并在列和对角线之间更新数据元素。 该指令还指示具有表示消息和常数数据的数据元素的第二源。 响应该指令,结果存储在指令指示的目的地中。 结果包括更新的状态矩阵数据元素,包括至少一组四个更新的状态矩阵数据元素。 四个更新的状态矩阵数据元素中的每一个表示已由G功能更新的第一源的四个状态矩阵数据元素中的相应一个。

    SIMD integer multiply-accumulate instruction for multi-precision arithmetic
    15.
    发明授权
    SIMD integer multiply-accumulate instruction for multi-precision arithmetic 有权
    用于多精度算术的SIMD整数乘法累加指令

    公开(公告)号:US09235414B2

    公开(公告)日:2016-01-12

    申请号:US13992728

    申请日:2011-12-19

    IPC分类号: G06F7/52 G06F9/30 G06F9/38

    摘要: A multiply-and-accumulate (MAC) instruction allows efficient execution of unsigned integer multiplications. The MAC instruction indicates a first vector register as a first operand, a second vector register as a second operand, and a third vector register as a destination. The first vector register stores a first factor, and the second vector register stores a partial sum. The MAC instruction is executed to multiply the first factor with an implicit second factor to generate a product, and to add the partial sum to the product to generate a result. The first factor, the implicit second factor and the partial sum have a same data width and the product has twice the data width. The most significant half of the result is stored in the third vector register, and the least significant half of the result is stored in the second vector register.

    摘要翻译: 乘法和累加(MAC)指令允许有效执行无符号整数乘法。 MAC指令表示作为第一操作数的第一向量寄存器,作为第二操作数的第二向量寄存器和作为目的地的第三向量寄存器。 第一向量寄存器存储第一因子,第二向量寄存器存储部分和。 执行MAC指令以将第一因子与隐含的第二因子相乘以生成乘积,并将部分和添加到乘积以生成结果。 第一个因素,隐含的第二个因子和部分和具有相同的数据宽度,产品的数据宽度是两倍。 结果的最大一半存储在第三向量寄存器中,结果的最低有效半存储在第二向量寄存器中。

    INSTRUCTION FOR ACCELERATING SNOW 3G WIRELESS SECURITY ALGORITHM
    17.
    发明申请
    INSTRUCTION FOR ACCELERATING SNOW 3G WIRELESS SECURITY ALGORITHM 有权
    加速雪的指令3G无线安全算法

    公开(公告)号:US20140189289A1

    公开(公告)日:2014-07-03

    申请号:US13730216

    申请日:2012-12-28

    IPC分类号: G06F15/80

    摘要: Vector instructions for performing SNOW 3G wireless security operations are received and executed by the execution circuitry of a processor. The execution circuitry receives a first operand of the first instruction specifying a first vector register that stores a current state of a finite state machine (FSM). The execution circuitry also receives a second operand of the first instruction specifying a second vector register that stores data elements of a liner feedback shift register (LFSR) that are needed for updating the FSM. The execution circuitry executes the first instruction to produce a updated state of the FSM and an output of the FSM in a destination operand of the first instruction.

    摘要翻译: 用于执行SNOW 3G无线安全操作的矢量指令由处理器的执行电路接收和执行。 执行电路接收指定存储有限状态机(FSM)的当前状态的第一向量寄存器的第一指令的第一操作数。 执行电路还接收指定第二向量寄存器的第一指令的第二操作数,该第二指令寄存器存储用于更新FSM所需的线性反馈移位寄存器(LFSR)的数据元素。 执行电路执行第一指令以产生FSM的更新状态和FSM在第一指令的目的地操作数中的输出。

    INSTRUCTIONS PROCESSORS, METHODS, AND SYSTEMS TO PROCESS BLAKE SECURE HASHING ALGORITHM
    18.
    发明申请
    INSTRUCTIONS PROCESSORS, METHODS, AND SYSTEMS TO PROCESS BLAKE SECURE HASHING ALGORITHM 有权
    指令处理程序,方法和系统处理BLAKE安全冲洗算法

    公开(公告)号:US20140016773A1

    公开(公告)日:2014-01-16

    申请号:US13976741

    申请日:2011-12-22

    IPC分类号: H04L9/28

    摘要: A method of an aspect includes receiving an instruction indicating a first source having at least one set of four state matrix data elements, which represent a complete set of four inputs to a G function of a cryptographic hashing algorithm. The algorithm uses a sixteen data element state matrix, and alternates between updating data elements in columns and diagonals. The instruction also indicates a second source having data elements that represent message and constant data. In response to the instruction, a result is stored in a destination indicated by the instruction. The result includes updated state matrix data elements including at least one set of four updated state matrix data elements. Each of the four updated state matrix data elements represents a corresponding one of the four state matrix data elements of the first source, which has been updated by the G function.

    摘要翻译: 一种方面的方法包括:接收指示具有至少一组四个状态矩阵数据元素的第一源的指令,其表示对密码散列算法的G函数的四个输入的完整集合。 该算法使用十六个数据元素状态矩阵,并在列和对角线之间更新数据元素。 该指令还指示具有表示消息和常数数据的数据元素的第二源。 响应该指令,结果存储在指令指示的目的地中。 结果包括更新的状态矩阵数据元素,包括至少一组四个更新的状态矩阵数据元素。 四个更新的状态矩阵数据元素中的每一个表示已由G功能更新的第一源的四个状态矩阵数据元素中的相应一个。