公开(公告)号：US12169779B2

公开(公告)日：2024-12-17

申请号：US18310638

申请日：2023-05-02

Applicant: Google LLC

Inventor： Mark Sandler ,  Andrew Gerald Howard ,  Andrey Zhmoginov ,  Pramod Kaushik Mudrakarta

IPC: G10L15/16 ,  G06N3/045 ,  G06N3/08

Abstract: The present disclosure provides systems and methods that enable parameter-efficient transfer learning, multi-task learning, and/or other forms of model re-purposing such as model personalization or domain adaptation. In particular, as one example, a computing system can obtain a machine-learned model that has been previously trained on a first training dataset to perform a first task. The machine-learned model can include a first set of learnable parameters. The computing system can modify the machine-learned model to include a model patch, where the model patch includes a second set of learnable parameters. The computing system can train the machine-learned model on a second training dataset to perform a second task that is different from the first task, which may include learning new values for the second set of learnable parameters included in the model patch while keeping at least some (e.g., all) of the first set of parameters fixed.

公开(公告)号：US11734545B2

公开(公告)日：2023-08-22

申请号：US15898566

申请日：2018-02-17

Applicant: Google LLC

Inventor： Andrew Gerald Howard ,  Mark Sandler ,  Liang-Chieh Chen ,  Andrey Zhmoginov ,  Menglong Zhu

IPC: G06N3/04 ,  G06N3/08 ,  G06N3/045 ,  G06N3/048

CPC classification number: G06N3/04 ,  G06N3/045 ,  G06N3/08 ,  G06N3/048

Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.

公开(公告)号：US11593614B2

公开(公告)日：2023-02-28

申请号：US16338963

申请日：2017-10-06

Applicant: Google LLC

Inventor： Francois Chollet ,  Andrew Gerald Howard

IPC: G06N3/04 ,  G06N3/08 ,  G06K9/62 ,  G06V40/16 ,  G06V10/44

Abstract: A neural network system is configured to receive an input image and to generate a classification output for the input image. The neural network system includes: a separable convolution subnetwork comprising a plurality of separable convolutional neural network layers arranged in a stack one after the other, in which each separable convolutional neural network layer is configured to: separately apply both a depthwise convolution and a pointwise convolution during processing of an input to the separable convolutional neural network layer to generate a layer output.

公开(公告)号：US11157815B2

公开(公告)日：2021-10-26

申请号：US16524410

申请日：2019-07-29

Applicant: Google LLC

Inventor： Andrew Gerald Howard ,  Bo Chen ,  Dmitry Kalenichenko ,  Tobias Christoph Weyand ,  Menglong Zhu ,  Marco Andreetto ,  Weijun Wang

IPC: G06N3/08 ,  G06N3/04

Abstract: The present disclosure provides systems and methods to reduce computational costs associated with convolutional neural networks. In addition, the present disclosure provides a class of efficient models termed “MobileNets” for mobile and embedded vision applications. MobileNets are based on a straight-forward architecture that uses depthwise separable convolutions to build light weight deep neural networks. The present disclosure further provides two global hyper-parameters that efficiently trade-off between latency and accuracy. These hyper-parameters allow the entity building the model to select the appropriately sized model for the particular application based on the constraints of the problem. MobileNets and associated computational cost reduction techniques are effective across a wide range of applications and use cases.

公开(公告)号：US20250061333A1

公开(公告)日：2025-02-20

申请号：US18939318

申请日：2024-11-06

Applicant: Google LLC

Inventor： Mark Sandler ,  Andrew Gerald Howard ,  Andrey Zhmoginov ,  Pramod Kaushik Mudrakarta

IPC: G06N3/08 ,  G06N3/045 ,  G10L15/16

Abstract: The present disclosure provides systems and methods that enable parameter-efficient transfer learning, multi-task learning, and/or other forms of model re-purposing such as model personalization or domain adaptation. In particular, as one example, a computing system can obtain a machine-learned model that has been previously trained on a first training dataset to perform a first task. The machine-learned model can include a first set of learnable parameters. The computing system can modify the machine-learned model to include a model patch, where the model patch includes a second set of learnable parameters. The computing system can train the machine-learned model on a second training dataset to perform a second task that is different from the first task, which may include learning new values for the second set of learnable parameters included in the model patch while keeping at least some (e.g., all) of the first set of parameters fixed.

公开(公告)号：US20240119256A1

公开(公告)日：2024-04-11

申请号：US18486534

申请日：2023-10-13

Applicant: Google LLC

Inventor： Andrew Gerald Howard ,  Mark Sandler ,  Liang-Chieh Chen ,  Andrey Zhmoginov ,  Menglong Zhu

IPC: G06N3/04 ,  G06N3/045 ,  G06N3/08

CPC classification number: G06N3/04 ,  G06N3/045 ,  G06N3/08 ,  G06N3/048

Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.

公开(公告)号：US20230297852A1

公开(公告)日：2023-09-21

申请号：US18007379

申请日：2021-07-29

Applicant: Google LLC

Inventor： Li Zhang ,  Andrew Gerald Howard ,  Brendan Wesley Jou ,  Yukun Zhu ,  Mingda Zhang ,  Andrey Zhmoginov

IPC: G06N5/022

CPC classification number: G06N5/022

Abstract: Example implementations of the present disclosure combine efficient model design and dynamic inference. With a standalone lightweight model, the unnecessary computation on easy examples is avoided and the information extracted by the lightweight model also guide the synthesis of a specialist network from the basis models. With extensive experiments on ImageNet it is shown that a proposed example BasisNet is particularly effective for image classification and a BasisNet-MV3 achieves 80.3% top-1 accuracy with 290 M MAdds without early termination.

公开(公告)号：US20210350206A1

公开(公告)日：2021-11-11

申请号：US17382503

申请日：2021-07-22

Applicant: Google LLC

Inventor： Andrew Gerald Howard ,  Mark Sandler ,  Liang-Chieh Chen ,  Andrey Zhmoginov ,  Menglong Zhu

IPC: G06N3/04 ,  G06N3/08

Abstract: The present disclosure provides directed to new, more efficient neural network architectures. As one example, in some implementations, the neural network architectures of the present disclosure can include a linear bottleneck layer positioned structurally prior to and/or after one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. As another example, in some implementations, the neural network architectures of the present disclosure can include one or more inverted residual blocks where the input and output of the inverted residual block are thin bottleneck layers, while an intermediate layer is an expanded representation. For example, the expanded representation can include one or more convolutional layers, such as, for example, one or more depthwise separable convolutional layers. A residual shortcut connection can exist between the thin bottleneck layers that play a role of an input and output of the inverted residual block.