公开(公告)号：US20080101147A1

公开(公告)日：2008-05-01

申请号：US11552949

申请日：2006-10-25

申请人： Hossein Amidi

发明人： Hossein Amidi

IPC分类号： G11C5/14

CPC分类号： G11C5/143 ,  G11C7/22 ,  G11C11/406 ,  G11C11/40615 ,  G11C11/4074 ,  G11C11/4076 ,  G11C2211/4067

摘要： A system, method and apparatus for clock and power fault detection for a memory module is provided. In one embodiment, a system is provided. The system includes a voltage detection circuit and a clock detection circuit. The system further includes a controller coupled to the voltage detection circuit and the clock detection circuit. The system also includes a memory control state machine coupled to the controller. The system includes volatile memory coupled to the memory control state machine. The system further includes a battery and battery regulation circuitry coupled to the controller and the memory control state machine. The battery, battery regulation circuitry, volatile memory, memory control state machine, controller, clock detection circuit and voltage detection circuit are all collectively included in a unitary memory module.

摘要翻译： 提供了一种用于存储器模块的时钟和电源故障检测的系统，方法和装置。 在一个实施例中，提供了一种系统。 该系统包括电压检测电路和时钟检测电路。 该系统还包括耦合到电压检测电路和时钟检测电路的控制器。 该系统还包括耦合到控制器的存储器控​​制状态机。 该系统包括耦合到存储器控制状态机的易失性存储器。 该系统还包括耦合到控制器和存储器控制状态机的电池和电池调节电路。 电池，电池调节电路，易失性存储器，存储器控制状态机，控制器，时钟检测电路和电压检测电路都集成在一体的存储器模块中。

公开(公告)号：US20060118950A1

公开(公告)日：2006-06-08

申请号：US10613398

申请日：2003-07-03

申请人： Hossein Amidi ,  Kelvin Marino ,  Satyadey Kolli

发明人： Hossein Amidi ,  Kelvin Marino ,  Satyadey Kolli

IPC分类号： H01L23/34

CPC分类号： G11C5/04 ,  H05K1/0286 ,  H05K1/117

摘要： A memory module has a printed circuit board with connector pins. Several memory devices are mounted on the printed circuit board. An electrical circuit connects the memory devices to the connector pins such that the connector pins have multiple functionality based on the architecture of the memory devices used.

摘要翻译： 存储器模块具有带有连接器引脚的印刷电路板。 几个存储器件安装在印刷电路板上。 电路将存储器件连接到连接器引脚，使得连接器引脚具有基于所使用的存储器件的架构的多种功能。