公开(公告)号：US20190317802A1

公开(公告)日：2019-10-17

申请号：US16448860

申请日：2019-06-21

Applicant: Intel Corporation

Inventor： Alexander BACHMUTSKY ,  Andrew J. HERDRICH ,  Patrick CONNOR ,  Raghu KONDAPALLI ,  Francesc GUIM BERNAT ,  Scott P. DUBAL ,  James R. HEARN ,  Kapil SOOD ,  Niall D. MCDONNELL ,  Matthew J. ADILETTA

IPC: G06F9/48 ,  G06F9/50

Abstract: Examples are described herein that can be used to offload a sequence of work events to one or more accelerators to a work scheduler. An application can issue a universal work descriptor to a work scheduler. The universal work descriptor can specify a policy for scheduling and execution of one or more work events. The universal work descriptor can refer to one or more work events for execution. The work scheduler can, in some cases, perform translation of the universal work descriptor or a work event descriptor for compatibility and execution by an accelerator. The application can receive notice of completion of the sequence of work from the work scheduler or an accelerator.

公开(公告)号：US20180373553A1

公开(公告)日：2018-12-27

申请号：US15635124

申请日：2017-06-27

Applicant: Intel Corporation

Inventor： Patrick CONNOR ,  James R. Hearn ,  Scott P. DUBAL ,  Andrew J. HERDRICH ,  Kapil SOOD

IPC: G06F9/455

Abstract: Examples may include techniques to live migrate a virtual machine (VM) using disaggregated computing resources including compute and memory resources. Examples include copying data between allocated memory resources that serve as near or far memory for compute resources supporting the VM at a source or destination server in order to initiate and complete the live migration of the VM.