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11.发明授权公开(公告)号：US10523854B2
公开(公告)日：2019-12-31
申请号：US14750772
申请日：2015-06-25
Applicant: Intel Corporation
Inventor： Ramkumar Narayanswamy
Abstract: An array imaging apparatus having discrete camera modules is disclosed. In one embodiment, the apparatus comprises a substrate; and heterogeneous camera modules attached to the substrate and in a geometric relationship with each other, the heterogeneous camera modules having a substantially similar photometric response.
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公开(公告)号：US20190028688A1
公开(公告)日：2019-01-24
申请号：US15813012
申请日：2017-11-14
Applicant: INTEL CORPORATION
Inventor： Avinash Kumar , Ramkumar Narayanswamy , Manjula Gururaj
Abstract: System, apparatus, method, and computer readable media for on-the-fly dynamic calibration of multi-camera platforms using images of multiple different scenes. Image frame sets previously captured by the platform are scored as potential candidates from which new calibration parameters may be computed. The candidate frames are ranked according to their score and iteratively added to the calibration frame set according to an objective function. The selected frame set may be selected from the candidates based on a reference frame, which may be a most recently captured frame, for example. A device platform including a CM and comporting with the exemplary architecture may enhance multi-camera functionality in the field by keeping calibration parameters current. Various computer vision algorithms may then rely upon these parameters, for example.
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Patent Agency Ranking
公开(公告)号：US09654672B1
公开(公告)日：2017-05-16
申请号：US14935111
申请日：2015-11-06
Applicant: Intel Corporation
Inventor： Ramkumar Narayanswamy , Sheldon L. Sun , Joseph A. Hook
CPC classification number: H04N5/06 , H04N5/0733 , H04N5/247
Abstract: Synchronized capture of image and non-image sensor data is disclosed. In one embodiment, a device for synchronized capture comprises a synchronization signal generator to generate a synchronization (sync) signal for each of a plurality of heterogeneous capture devices and timestamping logic coupled to the synchronization signal generator to assign timestamp information to each set of data captured by individual capture devices of the plurality of capture devices to indicate when the data was captured, wherein the timestamp information is assigned based on when the sync signal is generated for its corresponding capture device and based on a first delay between when the sync signal is generated for a corresponding capture device and when processing of captured data, by a processing device, has been completed.
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14.发明授权公开(公告)号：US11356587B2
公开(公告)日：2022-06-07
申请号：US16730597
申请日：2019-12-30
Applicant: Intel Corporation
Inventor： Ramkumar Narayanswamy
Abstract: An array imaging apparatus having discrete camera modules is disclosed. In one embodiment, the apparatus comprises a substrate; and heterogeneous camera modules attached to the substrate and in a geometric relationship with each other, the heterogeneous camera modules having a substantially similar photometric response.
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公开(公告)号：US20190043220A1
公开(公告)日：2019-02-07
申请号：US15858063
申请日：2017-12-29
Applicant: Intel Corporation
Inventor： Avinash Kumar , Manjula Gururaj , Ramkumar Narayanswamy
Abstract: An embodiment of a semiconductor package apparatus may include technology to capture two or more concurrent images of a scene with two or more cameras, detect a feature in a first image from a first camera of the two or more cameras, match the feature in a second image from a second camera of the two or more cameras, and perform a photometric calibration between the first camera and the second camera based on a portion of the first image corresponding to the detected feature and a portion of the second image corresponding to the matched feature. Other embodiments are disclosed and claimed.
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公开(公告)号：US20160261807A1
公开(公告)日：2016-09-08
申请号：US14635614
申请日：2015-03-02
Applicant: Intel Corporation
Inventor： Kalpana Seshadrinathan , Ramkumar Narayanswamy , Alexander N. Zaplatin , Joseph A. Hook , Sheldon L. Sun , Igor V. Kozintsev
CPC classification number: H04N5/247 , H04N5/2258 , H04N5/232 , H04N5/23206 , H04N5/23229
Abstract: Techniques for image synchronization are described herein. The techniques may include a device having logic, at least partially including hardware logic, to implement modules. The modules may include a first sync pulse module to issue a first sync pulse after a first sync pulse offset period to a first imaging sensor. The modules may also include a second sync pulse module to issue a second sync pulse parallel to the first sync pulse after a second sync pulse offset period to a second imaging sensor.
Abstract translation: 本文描述了用于图像同步的技术。 这些技术可以包括具有至少部分地包括硬件逻辑的逻辑以实现模块的设备。 模块可以包括第一同步脉冲模块，以在第一同步脉冲偏移周期之后向第一成像传感器发出第一同步脉冲。 模块还可以包括第二同步脉冲模块，以在与第二成像传感器的第二同步脉冲偏移周期之后发出平行于第一同步脉冲的第二同步脉冲。
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公开(公告)号：US20160241791A1
公开(公告)日：2016-08-18
申请号：US14749786
申请日：2015-06-25
Applicant: Intel Corporation
Inventor： Ramkumar Narayanswamy , Ginni Grover , Ram C. Nalla
CPC classification number: G01B11/245 , G06T15/00 , H04N5/2258 , H04N5/23229
Abstract: Camera simulation is extended to multi-camera systems. One aspect relates combine computer-graphics, single-camera simulation, multi-camera image signal processor (ISP) are combined to simulate and optimize a multi-camera system. Scene modeling is performed using synthetic computer generated scenes. The computer-graphics images are generated, taking into account the camera-intrinsic and camera-extrinsic parameters.
Abstract translation: 相机模拟扩展到多相机系统。 一方面涉及组合计算机图形，单摄像机模拟，多摄像机图像信号处理器（ISP）的组合，以模拟和优化多摄像机系统。 使用合成计算机生成的场景进行场景建模。 产生计算机图形图像，同时考虑到相机本征和相机外在参数。
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