公开(公告)号：US10528695B1

公开(公告)日：2020-01-07

申请号：US16048093

申请日：2018-07-27

Applicant: International Business Machines Corporation

Inventor： Alexey Y. Lvov ,  Gi-Joon Nam ,  Benjamin Neil Trombley ,  Myung-Chul Kim ,  Paul G. Villarrubia

IPC: G06F17/50 ,  G06F17/15

Abstract: A putative circuit design is represented as a set of movable blocks of predetermined size which must fit into a bounding box, with a plurality of subsets to be interconnected by wires. A total weighted wire length is determined as a function of coordinates of centers of the movable blocks by summing a half perimeter wire length over the plurality of subsets, and a density penalty is determined as a convolution of an indicator function of the current placement and a convolution kernel, via incremental integer computation without use of floating point arithmetic. Blocks are moved to minimize a penalty function which is the sum of the total weighted wire length and the product of a density penalty weight and the density penalty. The process repeats until a maximum value of the density penalty weight is reached or the density penalty approaches zero.