公开(公告)号：US20210233996A1

公开(公告)日：2021-07-29

申请号：US17208622

申请日：2021-03-22

Applicant: International Business Machines Corporation

Inventor： Chen ZHANG ,  Peng XU ,  Chun Wing YEUNG

IPC: H01L29/06 ,  H01L29/786 ,  H01L29/10 ,  H01L29/66

Abstract: A semiconductor device and method for forming the same. The device comprises at least a dielectric layer, a two-dimensional (2D) material layer, a gate structure, and source/drain contacts. The 2D material layer contacts the dielectric layer. The gate structure contacts the 2D material layer. The source/drain contacts are disposed above the 2D material layer and contact the gate structure. The method includes forming a structure including at least a handle wafer, a 2D material layer, a gate structure in contact with the 2D material layer, an insulating layer, and a sacrificial layer. A portion of the sacrificial layer is etched. An inter-layer dielectric is formed in contact with the insulating layer and sidewalls of the sacrificial layer. The sacrificial layer and a portion of the insulating layer are removed. Source and drain contacts are formed in contact with the portion of the 2D material layer.

公开(公告)号：US20200328211A1

公开(公告)日：2020-10-15

申请号：US16381129

申请日：2019-04-11

Applicant: International Business Machines Corporation

Inventor： Zhenxing BI ,  Kangguo Cheng ,  Juntao LI ,  Peng XU

IPC: H01L27/092 ,  H01L29/161 ,  H01L29/10 ,  H01L21/8238

Abstract: An integrated semiconductor device having a substrate with a first substrate region and a second substrate region. The integrated semiconductor device further includes a first field-effect transistor disposed on the substrate in the first substrate region. The first filed-effect transistor has a plurality of first fins having a first semiconductor material. In addition, the integrated semiconductor device includes a second field-effect transistor disposed on the substrate in the second substrate region. The second field-effect transistor has a plurality of second fins having a second semiconductor material that differs from the first semiconductor material.

公开(公告)号：US20190214481A1

公开(公告)日：2019-07-11

申请号：US15865383

申请日：2018-01-09

Applicant: International Business Machines Corporation

Inventor： Kangguo CHENG ,  Peng XU

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/06 ,  H01L27/12 ,  H01L21/265 ,  H01L29/78

Abstract: Various methods and structures for fabricating a contact for a semiconductor FET or FinFET device. A semiconductor FET structure includes a substrate, a source/drain region layer and source/drain contact. First and second gate spacers are adjacent respective first and second opposing sides of the source/drain contact. The source/drain contact is disposed directly on and contacting the entire source/drain region layer, and at a vertical level thereabove, the source/drain contact being recessed to a limited horizontal area continuing vertically upwards from the vertical level. The limited horizontal area horizontally extending along less than a full horizontal length of a vertical sidewall of the first and second gate spacers, and less than fully covering the source/drain region layer. A method uses a reverse contact mask to form a shape of the source/drain contact into an inverted “T” shape.