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公开(公告)号：US12118433B2
公开(公告)日：2024-10-15
申请号：US17552018
申请日：2021-12-15
Applicant: International Business Machines Corporation
Inventor： Srikanth Srinivasan , George Andrew Keefe , David C. Mckay , Xuan Wei , Abhinav Kandala
CPC classification number: G06N10/40 , H10N60/805
Abstract: Systems and techniques that facilitate space-saving coupler arm arrangement for superconducting qubits are provided. In various embodiments, a device can comprise a superconducting qubit. In various aspects, the superconducting qubit can be capacitively coupled to two or more coupler arms. In various instances, a parasitic capacitance between the two or more coupler arms can be within an order of magnitude of a capacitance between the superconducting qubit and at least one of the two or more coupler arms. In various cases, the parasitic capacitance can arise due to a physical proximity between the two or more coupler arms.
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公开(公告)号：US20220416392A1
公开(公告)日：2022-12-29
申请号：US17930269
申请日：2022-09-07
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , William Francis Landers , Srikanth Srinivasan , Neereja Sundaresan
Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.
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公开(公告)号：US11469485B2
公开(公告)日：2022-10-11
申请号：US17076107
申请日：2020-10-21
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , William Francis Landers , Srikanth Srinivasan , Neereja Sundaresan
Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.
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公开(公告)号：US20220255540A1
公开(公告)日：2022-08-11
申请号：US17660916
申请日：2022-04-27
Applicant: International Business Machines Corporation
Inventor： David C. Mckay , Abhinav Kandala , Srikanth Srinivasan
IPC: H03K5/1252 , H03K17/92
Abstract: Systems and techniques that facilitate multi-resonant couplers for preserving ZX interaction while reducing ZZ interaction are provided. In various embodiments, a first qubit can have a first operational frequency and a second qubit can have a second operational frequency, and a multi-resonant architecture can couple the first qubit to the second qubit. In various embodiments, the multi-resonant architecture can comprise a first resonator and a second resonator. In various cases, the first resonator can capacitively couple the first qubit to the second qubit, and a second resonator can capacitively couple the first qubit to the second qubit. In various aspects, the first resonator and the second resonator can be in parallel. In various instances, the first resonator can have a first resonant frequency less than the first operational frequency and the second operational frequency, and the second resonator can have a second resonant frequency greater than the first operational frequency and the second operational frequency. In various other embodiments, the multi-resonant architecture can comprise a resonator, a first end of which can be capacitively coupled to the first qubit and to the second qubit, and a second end of which can be coupled to ground. In various instances, the resonator can have a first harmonic less than the first operational frequency and the second operational frequency, and can have a second harmonic greater than the first operational frequency and the second operational frequency. In various other embodiments, the multi-resonant architecture can comprise a resonator and a direct coupler. In various embodiments, the resonator and the direct coupler can both capacitively couple the first qubit to the second qubit, and the resonator and the direct coupler can be in parallel. In various cases, the direct coupler can couple opposite pads of the first qubit and the second qubit. In various embodiments, a first end of the resonator can be capacitively coupled to the first qubit and the second qubit, a second end of the resonator can be coupled to ground, and the direct coupler can capacitively couple common pads of the first qubit and the second qubit.
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公开(公告)号：US11329638B2
公开(公告)日：2022-05-10
申请号：US17135295
申请日：2020-12-28
Applicant: International Business Machines Corporation
Inventor： David C. Mckay , Abhinav Kandala , Srikanth Srinivasan
IPC: H03K5/1252 , H03K17/92
Abstract: Systems and techniques that facilitate multi-resonant couplers for preserving ZX interaction while reducing ZZ interaction are provided. In various embodiments, a first qubit can have a first operational frequency and a second qubit can have a second operational frequency, and a multi-resonant architecture can couple the first qubit to the second qubit. In various embodiments, the multi-resonant architecture can comprise a first resonator and a second resonator. In various cases, the first resonator can capacitively couple the first qubit to the second qubit, and a second resonator can capacitively couple the first qubit to the second qubit. In various aspects, the first resonator and the second resonator can be in parallel. In various instances, the first resonator can have a first resonant frequency less than the first operational frequency and the second operational frequency, and the second resonator can have a second resonant frequency greater than the first operational frequency and the second operational frequency. In various other embodiments, the multi-resonant architecture can comprise a resonator, a first end of which can be capacitively coupled to the first qubit and to the second qubit, and a second end of which can be coupled to ground. In various instances, the resonator can have a first harmonic less than the first operational frequency and the second operational frequency, and can have a second harmonic greater than the first operational frequency and the second operational frequency. In various other embodiments, the multi-resonant architecture can comprise a resonator and a direct coupler. In various embodiments, the resonator and the direct coupler can both capacitively couple the first qubit to the second qubit, and the resonator and the direct coupler can be in parallel. In various cases, the direct coupler can couple opposite pads of the first qubit and the second qubit. In various embodiments, a first end of the resonator can be capacitively coupled to the first qubit and the second qubit, a second end of the resonator can be coupled to ground, and the direct coupler can capacitively couple common pads of the first qubit and the second qubit.
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Patent Agency Ranking
公开(公告)号：US20220058508A1
公开(公告)日：2022-02-24
申请号：US16997311
申请日：2020-08-19
Applicant: International Business Machines Corporation
Inventor： Srikanth Srinivasan , John Blair , George Andrew Keefe , Thomas George McConkey , Dongbing Shao , Firat Solgun
Abstract: Devices and/or computer-implemented methods to facilitate a multipole filter on a quantum device with multiplexing capability and signal separation to mitigate crosstalk are provided. According to an embodiment, a device can comprise an interposer substrate comprising a readout resonator. The device can further comprise a qubit chip substrate comprising a qubit coupled to the readout resonator and to a multipole filter.
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公开(公告)号：US10924095B1
公开(公告)日：2021-02-16
申请号：US16896740
申请日：2020-06-09
Applicant: International Business Machines Corporation
Inventor： David C. Mckay , Abhinav Kandala , Srikanth Srinivasan
IPC: H03K17/92 , H03K5/1252
Abstract: Systems and techniques that facilitate multi-resonant couplers for preserving ZX interaction while reducing ZZ interaction are provided. In various embodiments, a first qubit can have a first operational frequency and a second qubit can have a second operational frequency, and a multi-resonant architecture can couple the first qubit to the second qubit. In various embodiments, the multi-resonant architecture can comprise a first resonator and a second resonator. In various cases, the first resonator can capacitively couple the first qubit to the second qubit, and a second resonator can capacitively couple the first qubit to the second qubit. In various aspects, the first resonator and the second resonator can be in parallel. In various instances, the first resonator can have a first resonant frequency less than the first operational frequency and the second operational frequency, and the second resonator can have a second resonant frequency greater than the first operational frequency and the second operational frequency. In various other embodiments, the multi-resonant architecture can comprise a resonator, a first end of which can be capacitively coupled to the first qubit and to the second qubit, and a second end of which can be coupled to ground. In various instances, the resonator can have a first harmonic less than the first operational frequency and the second operational frequency, and can have a second harmonic greater than the first operational frequency and the second operational frequency. In various other embodiments, the multi-resonant architecture can comprise a resonator and a direct coupler. In various embodiments, the resonator and the direct coupler can both capacitively couple the first qubit to the second qubit, and the resonator and the direct coupler can be in parallel. In various cases, the direct coupler can couple opposite pads of the first qubit and the second qubit. In various embodiments, a first end of the resonator can be capacitively coupled to the first qubit and the second qubit, a second end of the resonator can be coupled to ground, and the direct coupler can capacitively couple common pads of the first qubit and the second qubit.
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公开(公告)号：US12293253B2
公开(公告)日：2025-05-06
申请号：US16997311
申请日：2020-08-19
Applicant: International Business Machines Corporation
Inventor： Srikanth Srinivasan , John Blair , George Andrew Keefe , Thomas George McConkey , Dongbing Shao , Firat Solgun
Abstract: Devices and/or computer-implemented methods to facilitate a multipole filter on a quantum device with multiplexing capability and signal separation to mitigate crosstalk are provided. According to an embodiment, a device can comprise an interposer substrate comprising a readout resonator. The device can further comprise a qubit chip substrate comprising a qubit coupled to the readout resonator and to a multipole filter.
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公开(公告)号：US20220123449A1
公开(公告)日：2022-04-21
申请号：US17076107
申请日：2020-10-21
Applicant: International Business Machines Corporation
Inventor： Isaac Lauer , William Francis Landers , Srikanth Srinivasan , Neereja Sundaresan
Abstract: Techniques regarding an embedded microstrip transmission line implemented in one more superconducting microwave electronic devices are provided. For example, one or more embodiments described herein can comprise an apparatus, which can include a superconducting material layer positioned on a raised portion of a dielectric substrate. The raised portion can extend from a surface of the dielectric substrate. The apparatus can also comprise a dielectric film that covers at least a portion of the superconducting material layer and the raised portion of the dielectric substrate.
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公开(公告)号：US09229943B2
公开(公告)日：2016-01-05
申请号：US14570281
申请日：2014-12-15
Applicant: International Business Machines Corporation
Inventor： Kalyan C. Gunda , Srikanth Srinivasan
CPC classification number: G06F17/30371 , G06F11/1435 , G06F11/1453 , G06F17/30088 , G06F17/30138 , G06F17/30194
Abstract: A mechanism is provided for cross-allocated block repair in a mounted file system. A set of cross-allocated blocks are identified from a plurality of blocks within an inode of the mounted file system, based on a corresponding bit associated with each cross-allocated block in a duplicated block information bitmap being in a first identified state. The set of cross-allocated blocks are repaired using a user-defined repair process. Then one or more of the set of cross-allocated blocks are deallocated based on results of the user-defined repair process.
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