公开(公告)号：US20210152271A1

公开(公告)日：2021-05-20

申请号：US17134115

申请日：2020-12-24

Applicant: Intel Corporation

Inventor： Mark BORDOGNA ,  Janardhan SATYANARAYANA ,  Yoni LANDAU ,  Diwakar SUVVARI

IPC: H04J3/07 ,  H04J3/06 ,  H04L1/00

Abstract: In a transceiver, the accuracy of a packet time stamp can be improved by compensating for errors introduced by processing of the packet. A received packet can be received via multiple lanes. A packet time stamp can be measured using a start of frame delimiter (SFD). A last arriving lane can be used to provide a recovered clock signal. A phase offset between the recovered clock signal and the system clock of the transceiver can be used to adjust the time stamp. A position of the SFD within a data block can be used to adjust the time stamp. A position of the data block within a combined group of data blocks can be used to adjust the time stamp. Also, a serializer-deserializer delay associated with the last arriving lane can be used to adjust the time stamp.

公开(公告)号：US20190273571A1

公开(公告)日：2019-09-05

申请号：US16410275

申请日：2019-05-13

Applicant: Intel Corporation

Inventor： Mark BORDOGNA ,  Janardhan SATYANARAYANA ,  Yoni LANDAU ,  Diwakar SUVVARI

IPC: H04J3/07 ,  H04J3/06 ,  H04L1/00

Abstract: In a transceiver, the accuracy of a packet time stamp can be improved by compensating for errors introduced by processing of the packet. A received packet can be received via multiple lanes. A packet time stamp can be measured using a start of frame delimiter (SFD). A last arriving lane can be used to provide a recovered clock signal. A phase offset between the recovered clock signal and the system clock of the transceiver can be used to adjust the time stamp. A position of the SFD within a data block can be used to adjust the time stamp. A position of the data block within a combined group of data blocks can be used to adjust the time stamp. Also, a serializer-deserializer delay associated with the last arriving lane can be used to adjust the time stamp.