公开(公告)号：US20220157900A1

公开(公告)日：2022-05-19

申请号：US17455042

申请日：2021-11-16

Applicant: Japan Display Inc.

Inventor： Sho YANAGISAWA ,  Tetsuo MORITA ,  Kenji HARADA ,  Hiroshi TABATAKE ,  Hideyuki TAKAHASHI

IPC: H01L27/32

Abstract: According to one embodiment, a display device includes a base, a first insulating layer, a first pixel electrode on the first insulating layer in a pixel, a second pixel electrode on the first insulating layer in a dummy pixel, a second insulating layer on the first insulating layer, a first organic layer in the pixel and in contact with the first pixel electrode, a second organic layer in the dummy pixel, a partition wall on the second insulating layer and between the organic layers and a common electrode covering the organic layers and the partition wall. An end portion of the first organic layer is in contact with a side surface of the partition wall.

公开(公告)号：US20220157899A1

公开(公告)日：2022-05-19

申请号：US17451502

申请日：2021-10-20

Applicant: Japan Display Inc.

Inventor： Sho YANAGISAWA ,  Tetsuo MORITA ,  Kenji HARADA ,  Hiroshi TABATAKE ,  Hideyuki TAKAHASHI

IPC: H01L27/32

Abstract: According to one embodiment, a display device includes a substrate, first and second insulating layers, first and second pixel electrodes, first and second organic layers, first and second feed lines, first and second partitions, and a common electrode including first and second parts covering the first and second organic layers. The first organic layer is between the partitions. The second feed line and the second partition are located between the organic layers. The partitions are shaped such that a width of an upper part is greater than a width of a lower part. The first part is in contact with the first feed line between the first partition and the first organic layer.

公开(公告)号：US20230422551A1

公开(公告)日：2023-12-28

申请号：US18462442

申请日：2023-09-07

Applicant: Japan Display Inc.

Inventor： Kenji HARADA

IPC: H10K59/12 ,  H10K59/124 ,  H10K59/80 ,  H10K50/125 ,  H10K50/15

CPC classification number: H10K59/1201 ,  H10K59/124 ,  H10K59/8731 ,  H10K50/125 ,  H10K50/15 ,  H10K2102/302

Abstract: According to one embodiment, a display device includes first and second lower electrodes, a second insulating layer including a first trench, a light emitting layer and an upper electrode. The first trench includes first, second and third trench portions. A first gap in a lower portion of the first trench portion is greater than a second gap in an upper portion of the first trench portion, a third gap in a lower portion of the second trench portion is greater than a fourth gap in an upper portion of the second trench portion, and a fifth gap in a lower portion of the third trench portion is greater than a sixth gap in an upper portion of the third trench portion.

公开(公告)号：US20220320261A1

公开(公告)日：2022-10-06

申请号：US17657258

申请日：2022-03-30

Applicant: Japan Display Inc.

Inventor： Kenji HARADA

IPC: H01L27/32 ,  H01L51/52

Abstract: According to one embodiment, a display device includes a first power line located at a first end portion of a non-display region, a second power line located at a second end portion, a first auxiliary line disposed at a corner portion of a display region, and a second auxiliary line disposed on a center portion side of the display region, wherein the first auxiliary line includes a first resistance adjustment portion that adjusts resistance of the first auxiliary line, the second auxiliary line includes a second resistance adjustment portion that adjusts resistance of the second auxiliary line, and a first length of the first resistance adjustment portion is longer than a second length of the second resistance adjustment portion.

公开(公告)号：US20160225462A1

公开(公告)日：2016-08-04

申请号：US15001778

申请日：2016-01-20

Applicant: Japan Display Inc.

Inventor： Kenji HARADA

IPC: G11C19/28

CPC classification number: G11C19/28 ,  G09G2310/0267 ,  G09G2310/0286

Abstract: A shift register circuit is provided that can reduce the number of elements of transistors T.A signal generating circuit in each stage includes a set terminal receiving an output signal of the preceding stage, D1 having an anode connected to the set terminal, a reset terminal receiving an output signal of the next stage, T1 having a gate connected to the reset terminal, T1 connecting a cathode of D1 to VGL when the output signal from the next stage is input to the gate, T2 having a source connected to an output terminal and a drain receiving a clock signal, T3 having a source connected to VGL and a drain connected to the output terminal, an inverter circuit including T4 and T5, T6 having a source connected to a gate of T2, a drain connected to the cathode of D1 and a gate connected to VGH, and D2 having an anode connected to VGH. The input point of the inverter circuit is connected to the cathode of D1, the output point is connected to a gate of T3, and the high potential connection point is connected to a cathode of D2.

Abstract translation: 提供一种移位寄存器电路，其可以减少晶体管T的元件数量。每个级中的信号发生电路包括接收前一级的输出信号的设置端子，具有连接到设置端子的阳极的D1，复位端子 接收下一级的输出信号，具有连接到复位端子的栅极的T1，当来自下一级的输出信号输入到栅极时，T1将D1的阴极连接到VGL，将源极连接到输出端子 以及接收时钟信号的漏极，具有连接到VGL的源极和连接到输出端子的漏极的漏极，包括T4和T5的反相器电路，具有连接到T2的栅极的源极的T6，连接到阴极的漏极 D1和连接到VGH的栅极，以及具有连接到VGH的阳极的D2。 变频器电路的输入点连接到D1的阴极，输出点连接到T3的栅极，高电位连接点连接到D2的阴极。

公开(公告)号：US20140333862A1

公开(公告)日：2014-11-13

申请号：US14338064

申请日：2014-07-22

Applicant: JAPAN DISPLAY INC.

Inventor： Kenji HARADA

IPC: G02F1/133

CPC classification number: G02F1/13306 ,  G09G3/3655 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2310/0245 ,  G09G2310/0297

Abstract: A liquid crystal display device includes a plurality of common electrodes arranged so as to counter pixel electrodes extending in the row direction on a substrate. First and second voltage supply lines to supply first and second voltages to the common electrodes are connected with the common electrodes through a first switch circuit. A second switch circuit is arranged between the first voltage supply line and signal lines to switch a connection between the first voltage supply line and the signal lines. A gate open circuit is connected to scan lines to simultaneously supply a signal to switch on the pixel electrodes to all the scan lines. In case the power supply of the liquid crystal display device is turned off, a control circuit starts the power OFF driving operation to set the potential of the pixel electrode and the common electrode to substantially same by switching the first and second switch circuits.

Abstract translation: 液晶显示装置包括多个公共电极，其布置成对应于在基板上沿行方向延伸的像素电极。 向公共电极供给第一和第二电压的第一和第二电压供给线通过第一开关电路与公共电极连接。 在第一电压供给线和信号线之间设置第二开关电路，以切换第一电压供给线与信号线之间的连接。 栅极开路连接到扫描线以同时提供信号以将像素电极切换到所有扫描线。 在关闭液晶显示装置的电源的情况下，控制电路通过切换第一和第二开关电路来开始电源关闭驱动操作，以使像素电极和公共电极的电位基本相同。

公开(公告)号：US20140240374A1

公开(公告)日：2014-08-28

申请号：US14190279

申请日：2014-02-26

Applicant: Japan Display Inc.

Inventor： Kenji HARADA

IPC: G09G3/36

CPC classification number: G09G3/3655 ,  G09G2300/0426 ,  G09G2320/0233

Abstract: A row common electrode drive circuit and a column common electrode drive circuit control an effective value of a voltage to be applied to common electrodes along rows in which pixels are arrayed and an effective value of a voltage to be applied to the common electrodes along columns in which the pixels are arrayed.

Abstract translation: 行公共电极驱动电路和列公共电极驱动电路控制沿着排列像素的行中施加到公共电极的电压的有效值，并且沿着列中的列施加到公共电极的电压的有效值 哪些像素被排列。