公开(公告)号：US09184168B2

公开(公告)日：2015-11-10

申请号：US14072925

申请日：2013-11-06

申请人： Ho-In Ryu ,  Taiheui Cho ,  Keunnam Kim ,  Kyehee Yeom ,  Junghwan Park ,  Hyeon-Woo Jang

发明人： Ho-In Ryu ,  Taiheui Cho ,  Keunnam Kim ,  Kyehee Yeom ,  Junghwan Park ,  Hyeon-Woo Jang

IPC分类号： H01L29/788 ,  H01L27/108 ,  H01L21/768

CPC分类号： H01L27/1052 ,  H01L21/76829 ,  H01L27/10876 ,  H01L27/10894 ,  H01L29/42336

摘要： A semiconductor device includes a substrate including a cell region and a peripheral region, a cell gate electrode buried in a groove crossing a cell active portion of the cell region, a cell line pattern crossing over the cell gate electrode, the cell line pattern being connected to a first source/drain region in the cell active portion at a side of the cell gate electrode, a peripheral gate pattern crossing over a peripheral active portion of the peripheral region, a planarized interlayer insulating layer on the substrate around the peripheral gate pattern, and a capping insulating layer on the planarized interlayer insulating layer and a top surface of the peripheral gate pattern, the capping insulating layer including an insulating material having an etch selectivity with respect to the planarized interlayer insulating layer.

摘要翻译： 半导体器件包括：包括单元区域和外围区域的衬底;埋在与电池区域的电池活性部分交叉的沟槽中的电池栅电极;与电池栅电极交叉的电池线图案，连接的电池线图案 涉及在单元栅电极侧的单元有源部分中的第一源极/漏极区域，与周边区域的周边有源部分交叉的周边栅极图案，围绕周围栅极图案的基板上的平坦化层间绝缘层， 以及平坦化层间绝缘层上的覆盖绝缘层和外围栅极图案的上表面，封盖绝缘层包括相对于平坦化的层间绝缘层具有蚀刻选择性的绝缘材料。