Scalable interpoly dielectric stacks with improved immunity to program saturation
    11.
    发明授权
    Scalable interpoly dielectric stacks with improved immunity to program saturation 有权
    可扩展的互补电介质堆叠,具有提高的编程饱和度的免疫力

    公开(公告)号:US08441064B2

    公开(公告)日:2013-05-14

    申请号:US13207961

    申请日:2011-08-11

    IPC分类号: H01L29/72

    摘要: A method for manufacturing a non-volatile memory device is described. The method comprises growing a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored. A non-volatile memory device is also described. In the non-volatile memory device, the interpoly/blocking dielectric comprises a layer in a siliconoxide consuming material, e.g. DyScO, on top of the upper layer of the layer where charge is stored, the siliconoxide consuming material having consumed at least part of the upper layer.

    摘要翻译: 描述了用于制造非易失性存储器件的方法。 该方法包括在氧化硅消耗材料中生长一层,例如。 DyScO,在存储电荷的层的上层之上。 还描述了非易失性存储器件。 在非易失性存储器件中,多晶硅/绝缘电介质包括一层二氧化硅消耗材料, DyScO,在存储电荷的层的上层的顶部,消耗了上层的至少一部分的氧化硅消耗材料。

    ELECTRONIC DEVICE AND PROCESS FOR MANUFACTURING THE SAME
    12.
    发明申请
    ELECTRONIC DEVICE AND PROCESS FOR MANUFACTURING THE SAME 审中-公开
    电子设备及其制造方法

    公开(公告)号:US20080164581A1

    公开(公告)日:2008-07-10

    申请号:US11969679

    申请日:2008-01-04

    IPC分类号: H01L21/283 H01L23/58

    摘要: An electronic device and a process for manufacturing the same are disclosed. In one aspect, the device comprises an electrode comprising a metal compound selected from the group of tantalum carbide, tantalum carbonitride, hafnium carbide and hafnium carbonitride. The device further comprises a high-k dielectric layer of a hafnium oxide comprising nitrogen and silicon, the high-k dielectric layer having a k value of at least 4.0. The device further comprises a nitrogen and/or silicon and/or carbon barrier layer placed between the electrode and the high-k dielectric layer. The nitrogen and/or silicon and/or carbon barrier layer comprises one or more metal oxides, the metal of the metal oxides being selected from the group of lanthanides, aluminium or hafnium.

    摘要翻译: 公开了一种电子设备及其制造方法。 一方面,该装置包括一种包含选自碳化钽,碳氮化钽,碳化铪和碳氮化铪的金属化合物的电极。 该器件还包括包含氮和硅的氧化铪的高k电介质层,所述高k电介质层的k值至少为4.0。 该装置还包括置于电极和高k电介质层之间的氮和/或硅和/或碳阻挡层。 氮和/或硅和/或碳阻挡层包含一种或多种金属氧化物,金属氧化物的金属选自镧系元素,铝或铪。

    Method for fabricating a dual work function semiconductor device and the device made thereof
    16.
    发明授权
    Method for fabricating a dual work function semiconductor device and the device made thereof 有权
    双功能半导体器件的制造方法及其制造方法

    公开(公告)号:US09024299B2

    公开(公告)日:2015-05-05

    申请号:US12578439

    申请日:2009-10-13

    摘要: A method for manufacturing a dual work function semiconductor device and the device made thereof are disclosed. In one aspect, a method includes providing a gate dielectric layer over a semiconductor substrate. The method further includes forming a metal layer over the gate dielectric layer. The method further includes forming a layer of gate filling material over the metal layer. The method further includes patterning the gate dielectric layer, the metal layer and the gate filling layer to form a first and a second gate stack. The method further includes removing the gate filling material only from the second gate stack thereby exposing the underlying metal layer. The method further includes converting the exposed metal layer into an metal oxide layer. The method further includes reforming the second gate stack with another gate filling material.

    摘要翻译: 公开了一种制造双功能半导体器件的方法及其制造的器件。 一方面,一种方法包括在半导体衬底上提供栅介质层。 该方法还包括在栅介电层上形成金属层。 该方法还包括在金属层上形成栅极填充材料层。 该方法还包括图案化栅极介电层,金属层和栅极填充层以形成第一和第二栅极叠层。 该方法还包括仅从第二栅极堆叠去除栅极填充材料,从而暴露下面的金属层。 该方法还包括将暴露的金属层转变成金属氧化物层。 该方法还包括用另一种栅极填充材料重新构造第二栅极堆叠。

    METHOD FOR FABRICATING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE DEVICE MADE THEREOF
    18.
    发明申请
    METHOD FOR FABRICATING A DUAL WORK FUNCTION SEMICONDUCTOR DEVICE AND THE DEVICE MADE THEREOF 有权
    制造双功能半导体器件及其器件的方法

    公开(公告)号:US20100109095A1

    公开(公告)日:2010-05-06

    申请号:US12578439

    申请日:2009-10-13

    摘要: A method for manufacturing a dual work function semiconductor device and the device made thereof are disclosed. In one aspect, a method includes providing a gate dielectric layer over a semiconductor substrate. The method further includes forming a metal layer over the gate dielectric layer. The method further includes forming a layer of gate filling material over the metal layer. The method further includes patterning the gate dielectric layer, the metal layer and the gate filling layer to form a first and a second gate stack. The method further includes removing the gate filling material only from the second gate stack thereby exposing the underlying metal layer. The method further includes converting the exposed metal layer into an metal oxide layer. The method further includes reforming the second gate stack with another gate filling material.

    摘要翻译: 公开了一种制造双功能半导体器件的方法及其制造的器件。 一方面,一种方法包括在半导体衬底上提供栅介质层。 该方法还包括在栅介电层上形成金属层。 该方法还包括在金属层上形成栅极填充材料层。 该方法还包括图案化栅极介电层,金属层和栅极填充层以形成第一和第二栅极叠层。 该方法还包括仅从第二栅极堆叠去除栅极填充材料,从而暴露下面的金属层。 该方法还包括将暴露的金属层转变成金属氧化物层。 该方法还包括用另一种栅极填充材料重新构造第二栅极堆叠。

    CLEANING OF PLASMA CHAMBER WALLS USING NOBLE GAS CLEANING STEP
    19.
    发明申请
    CLEANING OF PLASMA CHAMBER WALLS USING NOBLE GAS CLEANING STEP 失效
    使用NOBLE气体清洁步骤清洗等离子体室壁

    公开(公告)号:US20090065025A1

    公开(公告)日:2009-03-12

    申请号:US12205596

    申请日:2008-09-05

    IPC分类号: B08B7/00

    CPC分类号: C23C16/4405 B08B7/0057

    摘要: An improved reaction chamber cleaning process is provided for removing water residues that makes use of noble-gas plasma reactions. The method is easy applicable and may be combined with standard cleaning procedure. A noble-gas plasma (e.g. He) that emits high energy EUV photons (E>20 eV) which is able to destruct water molecules to form electronically excited oxygen atoms is used to remove the adsorbed water.

    摘要翻译: 提供了一种改进的反应室清洁方法,用于除去利用惰性气体等离子体反应的水残余物。 该方法易于应用,可与标准清洗程序结合使用。 使用能够破坏水分子形成电子激发的氧原子的高能量EUV光子(E> 20eV)的稀有气体等离子体(例如He)去除吸附的水。