公开(公告)号：US20080045039A1

公开(公告)日：2008-02-21

申请号：US11873721

申请日：2007-10-17

申请人： Richard Conti ,  Ronald Bourque ,  Nancy Klymko ,  Anita Madan ,  Michael Smits ,  Roy Tilghman ,  Kwong Wong ,  Daewon Yang

发明人： Richard Conti ,  Ronald Bourque ,  Nancy Klymko ,  Anita Madan ,  Michael Smits ,  Roy Tilghman ,  Kwong Wong ,  Daewon Yang

IPC分类号： H01L21/31

CPC分类号： H01L21/823807 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/3185 ,  H01L21/823828 ,  H01L29/7843

摘要： A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride layer is deposited using a high-density plasma (HDP) process, wherein the substrate is disposed on an electrode to which a bias power in the range of about 50 W to about 500 W is supplied. The bias power is characterized as high-frequency power (supplied by an RF generator at 13.56 MHz). The FET device may also include NFET gate structures. A blocking layer is deposited over the NFET gate structures so that the nitride layer overlies the blocking layer; after the blocking layer is removed, the nitride layer is not in contact with the NFET gate structures. The nitride layer has a thickness in the range of about 300-2000 Å.

公开(公告)号：US20070004206A1

公开(公告)日：2007-01-04

申请号：US11467593

申请日：2006-08-28

申请人： Yun-Yu Wang ,  Richard Conti ,  Chung-Ping Eng ,  Matthew Nicholls

发明人： Yun-Yu Wang ,  Richard Conti ,  Chung-Ping Eng ,  Matthew Nicholls

IPC分类号： H01L21/44 ,  H01L23/48

CPC分类号： H01L21/76801 ,  H01L21/76832 ,  H01L21/76834 ,  H01L23/53228 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A cap nitride stack which prevents etch penetration to the HDP nitride while maintaining the electromigration benefits of HDP nitride atop Cu. In one embodiment, the stack comprises a first layer of HDP nitride and a second layer of a Si—C—H compound disposed over the first layer. The Si—C—H compound is for example BLoK, or N-BLoK (Si—C—H—N), and is selected from a group of materials that has high selectivity during via RIE such that RIE chemistry from the next wiring level does not punch through. Carbon and nitrogen are the key elements. In another embodiment, the stack comprises a first layer of HDP nitride, followed by a second layer of UVN (a plasma nitride), and a third layer comprising HDP nitride disposed over the second layer.

摘要翻译： 一种覆盖氮化物叠层，可以防止蚀刻渗透到HDP氮化物，同时保持在Cu顶部的HDP氮化物的电迁移效果。 在一个实施例中，堆叠包括第一层HDP氮化物和设置在第一层上的Si-C-H化合物的第二层。 Si-C-H化合物例如是BLoK或N-BLoK（Si-C-H-N），并且选自在通孔RIE期间具有高选择性的一组材料，使得来自下一个布线层的RIE化学不会穿透。 碳氮是关键要素。 在另一个实施例中，堆叠包括第一层HDP氮化物，随后是第二层UVN（等离子体氮化物），以及包含设置在第二层上的HDP氮化物的第三层。

公开(公告)号：US20050200056A1

公开(公告)日：2005-09-15

申请号：US11078497

申请日：2005-03-11

申请人： Richard Conti

发明人： Richard Conti

IPC分类号： C21D11/00

CPC分类号： C21C5/4673 ,  C21C2005/5288 ,  F27D21/0028 ,  Y02P10/216

摘要： A fluid depth determination system is provided for a vessel that contains first and second immiscible fluids, where the second fluid floats on top of the first fluid forming an interface therebetween. The system includes a first pressure probe which is located in the floor of the vessel, a second pressure probe being at least vertically moveable in the first and second fluids in a region of the interface, means for collecting pressure readings from the first and second pressure probes and means for calculating the depth of the first fluid based on a difference in the pressure readings. The present invention is also directed to a method of determining a depth of a first fluid having an immiscible second fluid floating on top of the first fluid and forming an interface therebetween.

摘要翻译： 为包含第一和第二不混溶流体的容器提供流体深度确定系统，其中第二流体浮在第一流体的顶部上，形成其间的界面。 该系统包括位于容器底部的第一压力探针，在界面的区域中至少可在第一和第二流体中垂直移动的第二压力探针，用于从第一和第二压力收集压力读数的装置 探针和用于基于压力读数的差计算第一流体的深度的装置。 本发明还涉及一种确定第一流体的深度的方法，该第一流体具有漂浮在第一流体的顶部上并且在其间形成界面的不混溶的第二流体。

公开(公告)号：US20050079701A1

公开(公告)日：2005-04-14

申请号：US10905068

申请日：2004-12-14

申请人： Heidi Baks ,  Richard Bruff ,  Richard Conti ,  Allan Upham

发明人： Heidi Baks ,  Richard Bruff ,  Richard Conti ,  Allan Upham

IPC分类号： H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76808 ,  H01L21/31144 ,  H01L21/76804

摘要： This invention relates to the manufacture of dual damascene interconnect structures in integrated circuit devices. Specifically, a method is disclosed for forming a single or dual damascene structure in a low-k dielectric thin film utilizing a planarizing material and a compressive diffusion barrier material. The barrier material preferably has a compressive stress of greater than 300 MPa. In a preferred dual damascene embodiment of this method, the vias are formed first in the dielectric material, then the planarizing material is deposited in the vias and on the dielectric material, and the barrier material is deposited on the planarizing material. The trenches are then formed lithographically in the imaging material, etched through the barrier material into the planarizing material, and the trench pattern is transferred to the dielectric material. During and following the course of these etch steps, the imaging, barrier and planarizing materials are removed. The resultant dual damascene structure may then be metallized. With this method, the problem of photoresist poisoning by the interlevel dielectric material is alleviated.

摘要翻译： 本发明涉及集成电路器件中的双镶嵌互连结构的制造。 具体地，公开了一种利用平面化材料和压缩扩散阻挡材料在低k电介质薄膜中形成单一或双镶嵌结构的方法。 阻挡材料优选具有大于300MPa的压缩应力。 在该方法的优选双镶嵌实施例中，首先在电介质材料中形成通孔，然后将平坦化材料沉积在通孔和介电材料上，并且阻挡材料沉积在平坦化材料上。 然后在成像材料中光刻地形成沟槽，通过阻挡材料蚀刻成平坦化材料，并将沟槽图案转移到电介质材料。 在这些蚀刻步骤期间和之后，去除成像，阻挡层和平坦化材料。 然后可以将所得的双镶嵌结构金属化。 通过这种方法，可以减轻层间电介质材料的光致抗蚀剂中毒问题。

公开(公告)号：US5616857A

公开(公告)日：1997-04-01

申请号：US591292

申请日：1996-01-25

申请人： John J. Merck, Jr. ,  Jon Wyman ,  Richard Conti

发明人： John J. Merck, Jr. ,  Jon Wyman ,  Richard Conti

IPC分类号： G01N3/00 ,  G01N3/42

CPC分类号： G01N3/42 ,  G01N2203/0082

摘要： A hardness tester is disclosed which conducts its hardness test through a penetrator impinging upon the surface of a test specimen. Enhanced accuracy and repeatability is achieved through the use of a closed loop system and directly mounting a load cell to the indentor, connecting a linear displacement transducer directly to the load cell and eliminating an elevating screw in initially positioning and applying load to the specimen to be tested.

摘要翻译： 公开了一种通过撞击在试样表面上的穿透器来进行其硬度试验的硬度计。 通过使用闭环系统并将称重传感器直接安装在压头上，可以实现提高的精度和重复性，将直线位移传感器直接连接到称重传感器，并消除升降螺钉初始定位并向试样施加载荷 测试。