Abstract:
Disclosed are systems and methods for electrical verification of integrated circuits. Methodologies are described for verification of the power and ground distribution systems (PDS) for system-on-a-chip (SoC) and the verification of the interaction of the PDS with the behavior of integrated circuits.
Abstract:
Disclosed are systems and methods for electrical verification of integrated circuits. Methodologies are described for verification of the power and ground distribution systems (PDS) for system-on-a-chip (SoC) and the verification of the interaction of the PDS with the behavior of integrated circuits.
Abstract:
Disclosed are systems and methods for electrical verification of integrated circuits. Methodologies are described for verification of the power and ground distribution systems (PDS) for system-on-a-chip (SoC) and the verification of the interaction of the PDS with the behavior of integrated circuits.
Abstract:
An integrated circuit has a metal layer that includes conductors to provide interconnectivity for components of the integrated circuit chip. The metal layer is divided into at least two sections, such that a first section has a preferred direction and the second section has a preferred wiring direction that is different from the first preferred direction. The first and second preferred directions on a single metal layer may consist of any direction. The metal layer may be divided into more than two sections, wherein each section has a preferred wiring direction. Wiring geometries for multi-level metal layers are also disclosed.