公开(公告)号：US20070159488A1

公开(公告)日：2007-07-12

申请号：US11611745

申请日：2006-12-15

申请人： John Danskin ,  John Montrym ,  John Lindholm ,  Steven Molnar ,  Mark French

发明人： John Danskin ,  John Montrym ,  John Lindholm ,  Steven Molnar ,  Mark French

IPC分类号： G06F15/80

CPC分类号： G06T15/005 ,  G06T2210/52 ,  G09G5/363 ,  G09G5/393 ,  G09G2360/06 ,  G09G2360/122

摘要： A parallel array architecture for a graphics processor includes a multithreaded core array including a plurality of processing clusters, each processing cluster including at least one processing core operable to execute a pixel shader program that generates pixel data from coverage data; a rasterizer configured to generate coverage data for each of a plurality of pixels; and pixel distribution logic configured to deliver the coverage data from the rasterizer to one of the processing clusters in the multithreaded core array. The pixel distribution logic selects one of the processing clusters to which the coverage data for a first pixel is delivered based at least in part on a location of the first pixel within an image area. The processing clusters can be mapped directly to the frame buffers partitions without a crossbar so that pixel data is delivered directly from the processing cluster to the appropriate frame buffer partitions. Alternatively, a crossbar coupled to each of the processing clusters is configured to deliver pixel data from the processing clusters to a frame buffer having a plurality of partitions. The crossbar is configured such that pixel data generated by any one of the processing clusters is deliverable to any one of the frame buffer partitions.

摘要翻译： 用于图形处理器的并行阵列架构包括包括多个处理簇的多线程核心阵列，每个处理簇包括至少一个可操作以执行从覆盖数据生成像素数据的像素着色器程序的处理核心; 光栅化器，被配置为生成多个像素中的每一个的覆盖数据; 以及像素分布逻辑，被配置为将覆盖数据从光栅化器传送到多线程核心阵列中的处理集群之一。 所述像素分布逻辑至少部分地基于所述第一像素在图像区域内的位置来选择所述第一像素的所述覆盖数据被传送到的处理群集之一。 处理集群可以直接映射到没有交叉开关的帧缓冲区分区，以便将像素数据直接从处理集群传递到适当的帧缓冲区分区。 或者，耦合到每个处理集群的交叉开关被配置为将像素数据从处理集群传送到具有多个分区的帧缓冲器。 交叉开关被配置为使得由处理集群中的任何一个生成的像素数据可传送到任何一个帧缓冲器分区。