Designing of a logic circuit for testability
    11.
    发明授权
    Designing of a logic circuit for testability 失效
    设计可测性的逻辑电路

    公开(公告)号:US07437340B2

    公开(公告)日:2008-10-14

    申请号:US10190158

    申请日:2002-07-05

    IPC分类号: G06F17/00 G06N5/02

    CPC分类号: G01R31/31704

    摘要: The area of the circuit to be added for easy testability is reduced. Operations contained in a behavioral description are extracted in an operation analyzing unit; when expanding any operation at the time of behavioral synthesis, if the area of the circuit can be reduced to a greater extent when a DFT is applied to the operation before expansion, a parameter indicating that the operation is not to be expanded at the time of behavioral synthesis is generated and DFT information is added to a DFT library. A behavioral synthesis unit, in accordance with the parameter, generates an RTL description without expanding the operation. A DFT unit implements the DFT by referring to the DFT library, and thereafter expands the operation.

    摘要翻译: 减少了要添加的电路的面积以便易于测试。 包含在行为描述中的操作在操作分析单元中提取; 当在行为合成时扩展任何操作时,如果当DFT应用于扩展之前的操作时可以将电路的面积减小到更大的程度,那么指示在扩展之前操作不被扩展的参数 生成行为综合,并将DFT信息添加到DFT库中。 行为合成单元根据该参数生成RTL描述而不扩展操作。 DFT单元通过参考DFT库实现DFT,然后扩展操作。

    Method and apparatus for functional level data interface
    12.
    发明授权
    Method and apparatus for functional level data interface 失效
    功能级数据接口的方法和装置

    公开(公告)号:US5623417A

    公开(公告)日:1997-04-22

    申请号:US294393

    申请日:1994-08-23

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: The functional design of logical circuits is represented using different types of functional components. The unification of the database and the interface permits the unification of functional design automation tools. These functional components are a data transfer component, an external pin component, a register component, a terminal component, a constant component, a function component, a memory component, a submodule component, a state machine component, and a logical expression component. An HDL (Hardware Description Language) file containing functional operation descriptions or functional design data is input, and the input functional data is assigned to each functional component stored in a functional component library through a functional component assignment process. The functional data records assigned by functional component are written into a function database by means of corresponding write sections provided in a functional data input interface. The functional data records stored in the function database are read out through corresponding read sections provided in a functional data output interface, whereby arbitrary design tool data is generated at a function level by means of a functional data generation process.

    摘要翻译: 使用不同类型的功能组件来表示逻辑电路的功能设计。 数据库和接口的统一允许统一功能设计自动化工具。 这些功能组件是数据传输组件,外部引脚组件,寄存器组件,终端组件,常数组件,功能组件,存储器组件,子模块组件,状态机组件和逻辑表达组件。 输入包含功能操作描述或功能设计数据的HDL(硬件描述语言)文件,并且通过功能组件分配过程将输入功能数据分配给存储在功能组件库中的每个功能组件。 由功能部件分配的功能数据记录通过功能数据输入接口中提供的对应写入部分写入功能数据库。 存储在功能数据库中的功能数据记录通过功能数据输出接口中提供的相应读取部分读出,由此通过功能数据生成处理在功能级别生成任意设计工具数据。