公开(公告)号：US11158234B2

公开(公告)日：2021-10-26

申请号：US16517674

申请日：2019-07-22

Applicant: Novatek Microelectronics Corp.

Inventor： Yen-Cheng Cheng ,  Hsiu-Hui Yang

IPC: G09G3/20

Abstract: A channel circuit of a source driver, including a first digital-to-analog converter (DAC), a second DAC, a first switch, a second switch and an output buffer circuit, is provided. The output terminal of the output buffer circuit is configured to be coupled to a data line of a display panel. An output terminal of the first DAC is coupled to a first input terminal among the input terminals of the output buffer circuit. An output terminal of the second DAC is coupled to a second input terminal among the input terminals of the output buffer circuit. The first switch is disposed along a first signal path between the output terminal of the first DAC and the output terminal of the output buffer circuit. The second switch is disposed along a second signal path between the output terminal of the second DAC and the output terminal of the output buffer circuit.

公开(公告)号：US20210225248A1

公开(公告)日：2021-07-22

申请号：US17149693

申请日：2021-01-14

Applicant: Novatek Microelectronics Corp.

Inventor： Yen-Cheng Cheng ,  Hsiu-Hui Yang

IPC: G09G3/20

Abstract: A display panel is provided. The display panel includes a pixel array, multiple data lines and first scan lines. The pixel array is arranged in multiple pixel rows by multiple pixel columns, and includes a first pixel row, a second pixel row, and a third pixel row which are adjacent pixel rows. The first scan line is coupled to multiple first pixel groups. Each first pixel group includes multiple first pixels in the first pixel row and multiple second pixels in the second pixel row adjacent to the first pixel row. A display driving circuit for driving a display panel is also provided.

公开(公告)号：US20210020135A1

公开(公告)日：2021-01-21

申请号：US16513723

申请日：2019-07-17

Applicant: NOVATEK Microelectronics Corp.

Inventor： Hsiu-Hui Yang ,  Yen-Cheng Cheng ,  Chin-Hung Hsu

IPC: G09G3/36 ,  G11C7/10

Abstract: An output circuit of a driver includes a plurality of output nodes, a first output buffer group and a multiplexer. The first output buffer group is configured to output data to the plurality of output nodes, wherein each output buffer in the first output buffer group is configured to output data to at least two output nodes among the plurality of output nodes. The multiplexer, coupled between the plurality of output nodes and the first output buffer group, is configured to select to couple each output buffer in the first output buffer group to one of the plurality of output nodes.

公开(公告)号：US11942015B2

公开(公告)日：2024-03-26

申请号：US17506662

申请日：2021-10-20

Applicant: Novatek Microelectronics Corp.

Inventor： Yen-Cheng Cheng ,  Hsiu-Hui Yang

IPC: G09G3/20

CPC classification number: G09G3/2074 ,  G09G2310/0297 ,  G09G2320/0276 ,  G09G2320/0673

Abstract: A source driver, including a plurality of channel circuits, each of the plurality of channel circuits including a first digital-to-analog converter (DAC), a second DAC, a first switch, a second switch and an output buffer circuit, is provided. The output terminal of the output buffer circuit is configured to be coupled to a data line of a display panel. An output terminal of the first DAC is coupled to a first input terminal among the input terminals of the output buffer circuit. An output terminal of the second DAC is coupled to a second input terminal among the input terminals of the output buffer circuit. The first switch is disposed along a first signal path between the output terminal of the first DAC and the output terminal of the output buffer circuit. The second switch is disposed along a second signal path between the output terminal of the second DAC and the output terminal of the output buffer circuit.

公开(公告)号：US10991290B1

公开(公告)日：2021-04-27

申请号：US17064640

申请日：2020-10-07

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Hsiu-Hui Yang ,  Yu-Shao Liu ,  Chin-Hung Hsu ,  Yen-Cheng Cheng

IPC: G09G3/20

Abstract: Control methods of a channel setting module applied to a display panel are provided. The display panel has gate lines, source lines, and pixels. The pixels are arranged in matrix. The pixels disposed at the same row are electrically connected to the same gate line, and the pixels disposed at the same column are electrically connected to the same source line. The adoption of the channel setting module reduces the control signals required by the source lines. The channel setting module includes operational amplifiers and de-mux switches, and the control methods dynamically determine conduction states of the de-mux switches. The voltage outputs of the operational amplifiers are selectively outputted to the source lines, depending on conduction statuses of the de-mux switches. By applying the control methods, the interference between the source lines are reduced, and the instantaneous overshoots/undershoots of floating channels are depressed.

公开(公告)号：US20200027387A1

公开(公告)日：2020-01-23

申请号：US16517674

申请日：2019-07-22

Applicant: Novatek Microelectronics Corp.

Inventor： Yen-Cheng Cheng ,  Hsiu-Hui Yang

IPC: G09G3/20

Abstract: A channel circuit of a source driver, including a first digital-to-analog converter (DAC), a second DAC, a first switch, a second switch and an output buffer circuit, is provided. The output terminal of the output buffer circuit is configured to be coupled to a data line of a display panel. An output terminal of the first DAC is coupled to a first input terminal among the input terminals of the output buffer circuit. An output terminal of the second DAC is coupled to a second input terminal among the input terminals of the output buffer circuit. The first switch is disposed along a first signal path between the output terminal of the first DAC and the output terminal of the output buffer circuit. The second switch is disposed along a second signal path between the output terminal of the second DAC and the output terminal of the output buffer circuit.

公开(公告)号：US20160118010A1

公开(公告)日：2016-04-28

申请号：US14711797

申请日：2015-05-14

Applicant: Novatek Microelectronics Corp.

Inventor： Chin-Hung Hsu ,  Hsiu-Hui Yang ,  Te-Hsien Kuo

IPC: G09G3/36

CPC classification number: G09G5/008 ,  G09G5/005 ,  G09G2370/08

Abstract: A display driving apparatus includes a timing controller, for generating and outputting a first clock signal and a first data signal; and a plurality of source drivers, each source driver receiving the first clock signal and the first data signal, wherein there is a respective first skew value between the received first clock signal and the received first data signal for each source driver; wherein each source driver adjusts the respective first skew value to a respective second skew value.

Abstract translation: 显示驱动装置包括：时序控制器，用于产生并输出第一时钟信号和第一数据信号; 以及多个源驱动器，每个源极驱动器接收第一时钟信号和第一数据信号，其中在接收的第一时钟信号和接收到的每个源极驱动器的第一数据信号之间存在相应的第一偏斜值; 其中每个源驱动器将相应的第一歪斜值调整到相应的第二歪斜值。