公开(公告)号：US11302267B2

公开(公告)日：2022-04-12

申请号：US17123129

申请日：2020-12-16

Applicant: Novatek Microelectronics Corp.

Inventor： Chun-Hung Chen ,  Chia-Hsin Tung ,  Hsin-Hung Ou ,  Hung-Yi Lin

IPC: G09G3/3291 ,  G09G3/3258

Abstract: A driving device and an operation method thereof are provided. The driver device includes a source driver circuit, an output switching circuit, and an equalization control circuit. Two input ends of the output switching circuit are coupled to two output ends of the source driver circuit. Two output ends of the output switching circuit are coupled to two data lines of an LED display panel. The equalization control circuit checks whether sub-pixel data of the two data lines meets a predetermined condition. A plurality of sub-pixels located on a current display line of the LED display panel are reset in a reset period. In a data scanning period after the reset period, the equalization control circuit determines whether to control the output switching circuit to perform an equalization operation on the two data lines according to the checking result.

公开(公告)号：US20200226982A1

公开(公告)日：2020-07-16

申请号：US16522661

申请日：2019-07-26

Applicant: NOVATEK Microelectronics Corp.

Inventor： Chia-Hsin Tung ,  Chun-Hung Chen

IPC: G09G3/3275

Abstract: A method of controlling a source driver includes the steps of: detecting a line of image data to be outputted by a plurality of channels of the source driver, to generate a detection result; generating a plurality of control signals according to the detection result, each of the plurality of control signals corresponding to a channel among the plurality of channels; and enabling or disabling an operational amplifier in each of the plurality of channels via one of the plurality of control signals corresponding to the channel.

公开(公告)号：US20190173457A1

公开(公告)日：2019-06-06

申请号：US15828618

申请日：2017-12-01

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Chien-Chuan Huang ,  Chia-Hsin Tung ,  Chun-Hung Chen ,  Hao-Jan Yang ,  Chieh-Hsiang Chang

IPC: H03K5/00 ,  H03K5/135 ,  G09G3/20 ,  G09G5/18 ,  H03K5/131 ,  G09G5/00

CPC classification number: H03K5/00006 ,  G06F1/10 ,  G09G3/2096 ,  G09G5/005 ,  G09G5/18 ,  H03K5/131 ,  H03K5/135

Abstract: A display driving circuit, a calibration module, and an associated calibration method are provided. The display driving circuit includes an internal clock circuit and the calibration module. The internal clock circuit generates an internal clock signal. The calibration module includes a counting circuit and a trimming circuit. The counting circuit counts pulses of a reference clock signal to generate a detected reference-clock count and counts pulses of the internal clock signal to generate a detected internal-clock count. The trimming circuit generates a calibration signal to adjust frequency of the internal clock signal when a predefined condition is satisfied. The predefined condition is related to comparison between a first preset count and one of the detected reference-clock count and the detected internal-clock count.