Abstract:
A system for displaying images is provided, including an active-matrix organic light emission display. The active-matrix organic light emission display comprises an active-matrix array on a display area of an array substrate, a peripheral circuit on a peripheral area of the array substrate, a reflective layer on the peripheral area of the array substrate, between a light emission plane and the peripheral circuit and covering the peripheral circuit, an organic light emission layer on the active-matrix array and a cover layer over the organic light emission layer, covering the display area and the peripheral area.
Abstract:
A pixel and a display panel using the pixel are provided. In the pixel, a driving element provides a driving circuit according to a data signal and a reference voltage to drive a light-emitting element to emit light. The electrical difference of the driving elements due to the fabrication process thereof does not affect the brightness of the light-emitting elements. Moreover, unequal brightness resulted from the equivalent resistance of the power lines is also prevented.
Abstract:
A pixel and a display panel using the pixel are provided. In the pixel, a driving element provides a driving circuit according to a data signal and a reference voltage to drive a light-emitting element to emit light. The electrical difference of the driving elements due to the fabrication process thereof does not affect the brightness of the light-emitting elements. Moreover, unequal brightness resulted from the equivalent resistance of the power lines is also prevented.
Abstract:
A system for displaying images is provided, including an active-matrix organic light emission display. The active-matrix organic light emission display comprises an active-matrix array on a display area of an array substrate, a peripheral circuit on a peripheral area of the array substrate, a reflective layer on the peripheral area of the array substrate, between a light emission plane and the peripheral circuit and covering the peripheral circuit, an organic light emission layer on the active-matrix array and a cover layer over the organic light emission layer, covering the display area and the peripheral area.
Abstract:
A system for displaying image is provided. The system includes a pixel unit coupled to a source driver and including a first switch, a second switch, a first capacitor, a second capacitor, a driving transistor, and a luminiferous device. The first switch includes a first control terminal receiving a first scan signal, a first terminal receiving a first operation voltage, and a second terminal. The second switch includes a second control terminal receiving a second scan signal, a third terminal, and a fourth terminal coupled to the source driver. The first capacitor is coupled between the first and the second terminals. The second capacitor is coupled between the second and the third terminals. The driving transistor includes a gate coupled to the second terminal, a source receiving the first operation voltage, and a drain. The luminiferous device is coupled to the drain and receiving a second operation voltage.
Abstract:
A display panel includes a gate line circuit. The gate line circuit includes a gate driver, a control circuit and a gate line. The gate driver generates a first driving signal with alternate high and low levels. The first driving signal has a first rising edge and a first falling edge. The control circuit receives the first driving signal and generates a second driving signal. The second driving signal has a second rising edge and a second falling edge. The second rising edge and the second falling edge are respectively smoother than the first rising edge and the first falling edge. The control circuit includes at least one capacitor. The capacitor is charged in a first direction in response to the first rising edge of the first driving signal. The capacitor is charged in a second direction in response to the first falling edge of the first driving signal.
Abstract:
An electronic system including a shift register is disclosed. The shift register includes a first transistor, a first trigger circuit, a second transistor, and a second trigger circuit. The first transistor receives a first input signal. The first trigger circuit is serially connected to the first transistor between a first level and a second level and is connected with the first transistor in a first node. The second transistor receives a second input signal inverted to the first input signal. The second trigger circuit receives the level of the first node, is serially connected to the second transistor between a third level and the second level, and is connected with the second transistor in a second node.
Abstract:
A display system is disclosed in the present invention, which includes a low drop-out voltage regulator (LDO) for receiving an input voltage and providing a stable output voltage. The low drop-out voltage regulator includes a regulating circuit, a first switch, a current source circuit and an inverting circuit. The regulating circuit has a regulating circuit input, a regulating circuit output and a regulating circuit control terminal. The first switch selectively forms short or open circuit in accordance with ON/OFF states thereof. The current source circuit provides a fixed current to the control terminal and the output of the regulating circuit. The inverting circuit has an inverting circuit input coupled to the regulating circuit output and an inverting circuit output terminal coupled to the regulating circuit control terminal, the inverting circuit inverting the output voltage from the regulating circuit output. The regulating circuit control terminal adjusts the output voltage in accordance with a control voltage received thereof.
Abstract:
A driving device outputting a plurality of sequentially asserted driving signals is provided, including a shift register, a buffer unit, and switch circuits. The shift register includes shift registering units coupled in series. The shift registering units respectively generate shift registering signals which are sequentially asserted. The buffer unit receives at least one input signal. The input signal is periodically asserted, and the buffer unit outputs the input signal. The switch circuits are coupled to the shift registering units to receive the shift registering signals, respectively. All of the switch circuits are coupled to the buffer unit to receive the input signal, and the switch circuits sequentially output the input signal to serve as the driving signals according to the assertion of the shift registering signals.
Abstract:
A buffer circuit has a first transistor and a second transistor in a cascode, and a buffer switch coupled from an output of the buffer to a gate of the second transistor. The buffer circuit is bootstrapped by a bootstrap capacitor, a diode circuit, and a bootstrap switch. The bootstrap capacitor is coupled from the output to the gate of the second transistor through the bootstrap switch. A potential difference is set up across the bootstrap capacitor through the diode circuit. When a low input is given to the buffer circuit, the second transistor turns off and the output goes to a high bias voltage through the first transistor. When a high input is given, the first transistor turns off, the second transistor turns on, and as the output goes low, the gate of the second transistor is bootstrapped to drop the output completely down to a low bias voltage.