MULTI IQ-PATH SYNCHRONIZATION
    11.
    发明申请
    MULTI IQ-PATH SYNCHRONIZATION 有权
    多智能路径同步

    公开(公告)号:US20160056987A1

    公开(公告)日:2016-02-25

    申请号:US14465768

    申请日:2014-08-21

    CPC classification number: H04L27/2662 H04L27/2627 H04L27/2649 H04W56/0035

    Abstract: Aspects of a wireless apparatus and a method for handling a modulated signal include a frequency generator that produces a clock signal, a first synchronization circuit that generates a first sync enable signal based on an even edge of the clock signal, a second synchronization circuit that generates a second sync enable signal based on an even edge of the clock signal, a first divider having a first initial operating condition that generates a first IQ path based on the first sync enable signal, and a second divider having a second initial operating condition that generates a second IQ path based on the second sync enable signal, wherein the first and second operating conditions are not equal when initially powered.

    Abstract translation: 无线装置和处理调制信号的方法的方面包括产生时钟信号的频率发生器,基于时钟信号的偶边产生第一同步使能信号的第一同步电路,产生 基于所述时钟信号的偶边的第二同步使能信号,具有基于所述第一同步使能信号产生第一IQ路径的第一初始操作条件的第一分频器,以及产生第二初始操作条件的第二分频器, 基于第二同步使能信号的第二IQ路径,其中当初始供电时,第一和第二操作条件不相等。

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