公开(公告)号：US20150357335A1

公开(公告)日：2015-12-10

申请号：US14729395

申请日：2015-06-03

申请人： Renesas Electronics Corporation

发明人： Hiroyuki Kunishima ,  Masashige Moritoki ,  Toshiji Taiji ,  Youichi Yamamoto

IPC分类号： H01L27/108

CPC分类号： H01L27/10814 ,  H01L27/10817 ,  H01L27/10852

摘要： Dishing of a plate of a capacitor is suppressed in a structure where the top of the plate is flush with a top of an interconnection. Double interlayer dielectric films are used to form a first recess and a second recess. The second recess has an opening on the bottom of the first recess. The first and second recesses are used to form a capacitor. The lower electrode of the capacitor has a bottom part along the bottom of the first recess. The lower electrode further includes a sidewall part having an upper end that projects along a side face of the second recess from the opening of the second recess up to a position between the opening of the second recess and a top of the upper interlayer dielectric film (the upper one of the double interlayer dielectric films).

摘要翻译： 在板的顶部与互连的顶部齐平的结构中抑制电容器的板的损坏。 双层间绝缘膜用于形成第一凹部和第二凹部。 第二凹部在第一凹部的底部具有开口。 第一和第二凹槽用于形成电容器。 电容器的下电极具有沿着第一凹部的底部的底部。 下电极还包括侧壁部分，其具有从第二凹部的开口沿着第二凹部的侧面突出到第二凹部的开口和上层间电介质膜的顶部之间的位置的上端 双层间绝缘膜中的上层）。